Gpio Port E Mux 1 (Gpemux1) Register; Gpio Port E Mux 1 (Gpemux1) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)
Table 4-54. GPIO Port C MUX 1 (GPCMUX1) Register Field Descriptions (continued)
Bit Field
11-10 GPIO69
9-8 GPIO68
7-0 Reserved
4.2.7.6

GPIO Port E MUX 1 (GPEMUX1) Register

The GPIO Port E MUX 1 (GPEMUX1) register is shown and described in the figure and table below.
31
15 14 13 12
GPIO135 GPIO134
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-55. GPIO Port E MUX 1 (GPEMUX1) Register Field Descriptions
Bit Field
31-16 Reserved
15-14 GPIO135
13-12 GPIO134
11-10 GPIO133
9-8 GPIO132
400
General-Purpose Input/Output (GPIO)
Value Description
Configure this pin as:
00 GPIO 69 - general purpose I/O 69 (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 68 - general purpose I/O 68 (default)
01 Reserved
10 Reserved
11 Reserved
Reserved
Figure 4-47. GPIO Port E MUX 1 (GPEMUX1) Register
11 10 9
GPIO133 GPIO132
R/W-0 R/W-0
Value Description
Reserved
Configure this pin as:
00 GPIO 135 - general purpose I/O 135 (default)
01 Reserved
10 Reserved
11 COMP5OUT - Comparator 5 output (O)
Configure this pin as:
00 GPIO 134 - general purpose I/O 134 (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 133 - general purpose I/O 133 (default)
01 Reserved
10 Reserved
11 COMP4OUT - Comparator 4 output (O)
Configure this pin as:
00 GPIO 132 - general purpose I/O 132 (default)
01 Reserved
10 Reserved
11 COMP3OUT - Comparator 3 output (O)
Copyright © 2012–2019, Texas Instruments Incorporated
Reserved
R-0
8 7 6 5
GPIO131 GPIO130
R/W0 R/W0
SPRUH22I – April 2012 – Revised November 2019
www.ti.com
4 3 2 1
GPIO129 GPIO128
R/W-0 R/W-0
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