Gpio Port C Mux 1 (Gpcmux1) Register; Gpio Port C Mux 1 (Gpcmux1) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 4-53. GPIO Port B MUX 2 (GPBMUX2) Register Field Descriptions (continued)
Bit Field
7:6 GPIO51
5:4 GPIO50
3:2 GPIO49
1:0 GPIO48
4.2.7.5

GPIO Port C MUX 1 (GPCMUX1) Register

The GPIO Port C MUX 1 (GPCMUX1) register is shown and described in the figure and table below.
31
15 14 13 12
GPIO71 GPIO70
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-54. GPIO Port C MUX 1 (GPCMUX1) Register Field Descriptions
Bit Field
31-16 Reserved
15-14 GPIO71
13-12 GPIO70
SPRUH22I – April 2012 – Revised November 2019
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Value Description
Configure this pin as:
00 GPIO 51 - general purpose I/O 51 (default)
01 EQEP1B - eQEP1 input B (I)
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 50 - general purpose I/O 50 (default)
01 EQEP1A- eQEP1 input A (I)
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 49 - general purpose I/O 49 (default)
01 ECAP6 - eCAP6 (I/O)
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 48 - general purpose I/O 48 (default)
01 ECAP5 - eCAP5 (I/O)
10 Reserved
11 Reserved
Figure 4-46. GPIO Port C MUX 1 (GPCMUX1) Register
11 10 9
GPIO69 GPIO68
R/W-0 R/W-0
Value Description
Reserved
Configure this pin as:
00 GPIO 71 - general purpose I/O 71 (default)
01 Reserved
10 Reserved
11 Reserved
Configure this pin as:
00 GPIO 70 - general purpose I/O 70 (default)
01 Reserved
10 Reserved
11 Reserved
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
Reserved
R-0
8 7
General-Purpose Input/Output (GPIO)
Reserved
R-0
16
0
399