ST STM32G4 Series Reference Manual page 949

Advanced arm-based 32-bit mcus
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RM0440
26.5.26
HRTIM timer x deadtime register (HRTIM_DTxR) (x = A to F)
Address offset: Block A: 0x0B8
Address offset: Block B: 0x138
Address offset: Block C: 0x1B8
Address offset: Block D: 0x238
Address offset: Block E: 0x2B8
Address offset: Block F: 0x338
Reset value: 0x0000 0000
31
30
29
DTFLK
DTFSL
Res.
Res.
x
Kx
rwo
rwo
15
14
13
DTRLK
DTRSL
Res.
x
Kx
rwo
rwo
Bit 31 DTFLKx: Deadtime falling lock
This write-once bit prevents the deadtime (sign and value) to be modified, if enabled.
0: Deadtime falling value and sign is writable
1: Deadtime falling value and sign is read-only
Note: This bit is not preloaded
Bit 30 DTFSLKx: Deadtime falling sign lock
This write-once bit prevents the sign of falling deadtime to be modified, if enabled.
0: Deadtime falling sign is writable
1: Deadtime falling sign is read-only
Note: This bit is not preloaded.
Bits 29:26 Reserved, must be kept at reset value.
Bit 25 SDTFx: Sign deadtime falling value
This register determines whether the deadtime is positive (signals not overlapping) or negative
(signals overlapping).
0: Positive deadtime on falling edge
1: Negative deadtime on falling edge
Bits 24:16 DTFx[8:0]: Deadtime falling value
This register holds the value of the deadtime following a falling edge of reference PWM signal.
t
= DTFx[8:0] x t
DTF
Bit 15 DTRLKx: Deadtime rising lock
This write-once bit prevents the deadtime (sign and value) to be modified, if enabled.
0: Deadtime rising value and sign is writable
1: Deadtime rising value and sign is read-only
Note: This bit is not preloaded.
28
27
26
25
Res.
Res.
SDTFx
rw
12
11
10
9
DTPRSC[1:0]
SDTRx
rw
rw
rw
rw
DTG
24
23
22
rw
rw
rw
8
7
6
rw
rw
rw
RM0440 Rev 1
High-resolution timer (HRTIM)
21
20
19
18
DTFx[8:0]
rw
rw
rw
rw
5
4
3
2
DTRx[8:0]
rw
rw
rw
rw
17
16
rw
rw
1
0
rw
rw
949/2083
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