RM0440
31.4.4
Glitch filter
The LPTIM inputs, either external (mapped to GPIOs) or internal (mapped on the chip-level
to other embedded peripherals, such as embedded comparators), are protected with digital
filters that prevent any glitches and noise perturbations to propagate inside the LPTIM. This
is in order to prevent spurious counts or triggers.
Before activating the digital filters, an internal clock source should first be provided to the
LPTIM. This is necessary to guarantee the proper operation of the filters.
The digital filters are divided into two groups:
•
The first group of digital filters protects the LPTIM external inputs. The digital filters
sensitivity is controlled by the CKFLT bits
•
The second group of digital filters protects the LPTIM internal trigger inputs. The digital
filters sensitivity is controlled by the TRGFLT bits.
Note:
The digital filters sensitivity is controlled by groups. It is not possible to configure each digital
filter sensitivity separately inside the same group.
The filter sensitivity acts on the number of consecutive equal samples that should be
detected on one of the LPTIM inputs to consider a signal level change as a valid transition.
Figure 490
programmed.
CLKMUX
Input
Filter out
Note:
In case no internal clock signal is provided, the digital filter must be deactivated by setting
the CKFLT and TRGFLT bits to '0'. In that case, an external analog filter may be used to
protect the LPTIM external inputs against glitches.
31.4.5
Prescaler
The LPTIM 16-bit counter is preceded by a configurable power-of-2 prescaler. The prescaler
division ratio is controlled by the PRESC[2:0] 3-bit field. The table below lists all the possible
division ratios:
shows an example of glitch filter behavior in case of a 2 consecutive samples
Figure 490. Glitch filter timing diagram
2 consecutive samples
Table 306. Prescaler division ratios
programming
000
001
010
RM0440 Rev 1
2 consecutive samples
dividing factor
Low-power timer (LPTIM)
Filtered
MS32490V1
/1
/2
/4
1421/2083
1441
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