ST STM32G4 Series Reference Manual page 990

High-resolution timer (HRTIM)
26.5.52 HRTIM control register 2 (HRTIM_CR2)
Address offset: 0x384
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. TFRST TERST TDRST TCRST TBRST TARST
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Bits 31:22 Reserved, must be kept at reset value.
Bit 21 SWPF: Swap timer F outputs
Refer to SWPA description.
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 20 SWPE: Swap timer E outputs
Refer to SWPA description.
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 19 SWPD: Swap timer D outputs
Refer to SWPA description.
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 18 SWPC: Swap timer C outputs
Refer to SWPA description.
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 17 SWPB: Swap timer B outputs
Refer to SWPA description.
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 16 SWPA: Swap timer A outputs
This bit allows to swap the timer A outputs.
0: HRTIM_SETA1R and HRTIM_RSTA1R are coding for the output A1, HRTIM_SETA2R and
HRTIM_RSTA2R are coding for the output A2
1: HRTIM_SETA1R and HRTIM_RSTA1R are coding for the output A2, HRTIM_SETA2R and
HRTIM_RSTA2R are coding for the output A1
Note: This bit is not significant when the Push-pull mode is enabled (PSHPLL = 1).
Bit 15 Reserved, must be kept at reset value.
Bit 14 TFRST: Timer F counter software reset
Refer to TARST description.
Bit 13 TERST: Timer E counter software reset
Refer to TARST description.
Bit 12 TDRST: Timer D counter software reset
Refer to TARST description.
Bit 11 TCRST: Timer C counter software reset
Refer to TARST description.
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28 27 26 25
Res. Res. Res.
12 11 10 9
rw rw rw rw
24 23 22
Res. Res. Res. SWPF
8 7 6
TF
MRST Res.
SWU SWU
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RM0440 Rev 1
21 20 19 18
SWPE SWPD SWPC
rw rw rw rw
5 4 3 2
TE TD TC TB
SWU SWU SWU
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RM0440
17 16
SWPB SWPA
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1 0
TA
MSWU
SWU
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