ST STM32G4 Series Reference Manual page 567

RM0440
RCC
(Reset and
clock
controller)
Clock ratio constraint between ADC clock and AHB clock
There are generally no constraints to be respected for the ratio between the ADC clock and
the AHB clock except if some injected channels are programmed. In this case, it is
mandatory to respect the following ratio:
•
F
adc_hclk
•
F
adc_hclk
none with lower resolutions)
•
F
adc_hclk
Figure 80. ADC clock scheme
(ADC1, ADC2) or (ADC3, ADC4, ADC5)
adc_hclk
AHB interface
Bits CKMODE[1:0]
of ADCx_CCR
/1 or /2 or /4
/1, 2, 4, 6, 8, 10,
adc_ker_ck
12, 16, 32, 64,
128, 256
Bits PREC[3:0]
of ADCx_CCR
>= F / 4 if the resolution of all channels are 12-bit or 10-bit
ADC
>= F / 3 if there are some channels with resolutions equal to 8-bit (and
ADC
>= F / 2 if there are some channels with resolutions equal to 6-bit
ADC
RM0440 Rev 1
Analog-to-digital converters (ADC)
Others
00
Bits CKMODE[1:0]
of ADCx_CCR
Analog ADC1 or 3
(master)
Analog ADC2 or 4
(slave)
Analog ADC5
(single)
MSv46144V1
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