ST STM32G4 Series Reference Manual page 1439

RM0440
31.7.9 LPTIM option register (LPTIM_OR)
Address offset: 0x020
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31:6 Reserved, must be kept at reset value.
Bits 5:4 IN2[2:1]: LPTimer input 2 remap extension
Set and cleared by software.
00: connected to COMP2
01: connected to COMP4
10: connected to COMP6
11: connected to COMP6
Bits 3:2 IN1[2:1]: LPTimer input 1 remap extension
Set and cleared by software.
00: connected to COMP1
01: connected to COMP3
10: connected to COMP5
11: connected to COMP7
Bit 1 IN2[0]: LPTimer input 2 remap
Set and cleared by software.
1: connected to COMP output according to IN2[2:1] value
0: connected to GPIO
Bit 0 IN1[0]: LPTimer input 1 remap
Set and cleared by software.
1: connected to COMP output according to IN1[2:1] value
0: connected to GPIO
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
24 23 22
Res. Res. Res.
8 7 6
Res. Res. Res.
RM0440 Rev 1
Low-power timer (LPTIM)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
IN2[2:1] IN1[2:1]
rw rw rw rw
17 16
Res. Res.
1 0
IN2[0] IN1[0]
rw rw
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