Filter Math Accelerator (FMAC)
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Bits 31:16 Reserved
Bits 15:0 RDATA: Read data.
472/2083
28
27
26
25
Res.
Res.
Res.
12
11
10
9
When a read access to this register occurs, the read data are the contents of the Y output
buffer at the address offset indicated by the READ pointer. The pointer address is
automatically incremented after each read access.
24
23
22
Res.
Res.
Res.
Res.
8
7
6
RDATA[15:0]
r
RM0440 Rev 1
21
20
19
18
Res.
Res.
Res.
5
4
3
2
RM0440
17
16
Res.
Res.
1
0
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