Table 159. Analog Watchdog 1 Comparison - ST STM32G4 Series Reference Manual

Analog-to-digital converters (ADC)
These thresholds are programmed in bits HT1[11:0] and LT1[11:0] of the ADC_TR1 register
for the analog watchdog 1. When converting data with a resolution of less than 12 bits
(according to bits RES[1:0]), the LSB of the programmed thresholds must be kept cleared
because the internal comparison is always performed on the full 12-bit raw converted data
(left aligned).
Table 159
analog watchdog 1.
Resolution(
bit
RES[1:0])
00: 12-bit
01: 10-bit
10: 8-bit
11: 6-bit
1. Refer to
Analog watchdog filter for watchdog 1
When an ADC is configured with only one input channel (selecting several channels in Scan
mode not allowed), a valid ADC conversion data interval can be configured through the
ADC_TR1 register:
• When converted data belong to the interval defined in ADC_TR1, a DMA request is
generated.
•
Otherwise, no DMA request is issued. RDATA register is updated at each conversion. If
data are out-of-range a number of times higher than the value specified in AWDFILT bit
of ADC_TR1, the AWDx flag is set an the corresponding interrupt is issued.
Description of analog watchdog 2 and 3
The second and third analog watchdogs are more flexible and can guard several selected
channels by programming the corresponding bits in AWDCHx[19:0] (x=2,3).
The corresponding watchdog is enabled when any bit of AWDCHx[19:0] (x=2,3) is set.
They are limited to a resolution of 8 bits and only the 8 MSBs of the thresholds can be
programmed into HTx[7:0] and LTx[7:0].
performed for all the possible resolutions.
618/3748
describes how the comparison is performed for all the possible resolutions for

Table 159. Analog watchdog 1 comparison

Analog watchdog comparison
between:
Raw converted data,
(1)
left aligned
DATA[11:0]
DATA[11:2],00
DATA[11:4],0000
DATA[11:6],000000
Section : Gain compensation
Thresholds
LT1[11:0] and
-
HT1[11:0]
LT1[11:0] and User must configure LT1[1:0] and HT1[1:0]
HT1[11:0] to 00
LT1[11:0] and User must configure LT1[3:0] and HT1[3:0]
HT1[11:0] to 0000
LT1[11:0] and User must configure LT1[5:0] and HT1[5:0]
HT1[11:0] to 000000
for additional details on analog watchdog comparison.
Table 160 describes how the comparison is
RM0440 Rev 1
RM0440
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