Figure 207. Interleaved Up-Down Counter Operation; Figure 208. Push-Pull Up-Down Mode Example - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
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High-resolution timer (HRTIM)
Note:
In up-down counting mode, the compare values must be 3 periods of the fHRTIM clock
below the period value (TIMx_PER - 0xC0 if CKPSC[2:0] = 0, TIMx_PER - 0x60 if
CKPSC[2:0] = 1, TIMx_PER - 0x30 if CKPSC[2:0] = 2,...). This applies for the compare
events generated inside the timing unit. For compare events generated in other timing units,
it is mandatory to avoid any event occurring within less than 1 period of the fHRTIM clock of
a counter direction change (counter at 0, period event or counter reset).
The following features are supported in up-down counting mode:
Reset on CMP2
Set on CMP1
HRTIM_CHx1
HRTIM_CHx2
838/2083

Figure 207. Interleaved up-down counter operation

TimA
TimB
HRTIM_CHx1
HRTIM_CHy1
Half mode
Deadtime insertion
Push-pull mode, alternance push-pull done on when counter = 0 (see
Delayed Idle
Burst mode
PWM mode with "greater than" comparison (see

Figure 208. Push-pull up-down mode example

RM0440 Rev 1
Shorten pulse
on TB1 on
TimB counter
reset
Figure
Figure
209).
RM0440
MSv47420V2
208).
MSv50806V1

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