Figure 465. Break Circuitry Overview - ST STM32G4 Series Reference Manual

RM0440
The break is generated by the tim_brk inputs which has:
•
Programmable polarity (BKP bit in the TIMx_BDTR register)
•
Programmable enable bit (BKE bit in the TIMx_BDTR register)
•
Programmable filter (BKF[3:0] bits in the TIMx_BDTR register) to avoid spurious
events.
The break can be generated from multiple sources which can be individually enabled and
with programmable edge sensitivity, using the TIMx_AF1 register.
The sources for break (tim_brk) channel are:
•
External sources connected to one of the TIM_BKIN pin (as per selection done in the
AFIO controller), with polarity selection and optional digital filtering
•
Internal sources:
–
–
Break events can also be generated by software using BG bit in the TIMx_EGR register. All
sources are ORed before entering the timer tim_brk inputs, as per
tim_sys_brk0
tim_sys_brk1
tim_sys_brk2
tim_sys_brk3
tim_sys_brkx
CSS
BKINP
TIMx_BKIN
from AF
controller
BKCMP1P..BKCMP4P
4
tim_brk_cmp1..4
3
BKCMP5E..BKCMP7E
tim_brk_cmp5..7
Caution: An asynchronous (clockless) operation is only guaranteed when the programmable filter is
disabled. If it is enabled, a fail safe clock mode (for example, using the internal PLL and/or
the CSS) must be used to guarantee that break events are handled.
coming from a tim_brk_cmpx input (refer to
pins and internal signals
coming from a system break request on the tim_sys_brk inputs (refer to
Section 29.4.2: TIM15/TIM16/TIM17 pins and internal signals
implementation)

Figure 465. Break circuitry overview

Enable
Enable
Enable
Enable
Enable
BKINE
BKCMP1E
...
BKCMP4E
4
3
General-purpose timers (TIM15/TIM16/TIM17)
Section 29.4.2: TIM15/TIM16/TIM17
for product specific implementation)
tim_sys_brk
BKF[3:0] BKP
Filter
Application break requests
RM0440 Rev 1
for product specific
Figure 465 below.
SBIF flag
Software break
requests: BG
BIF flag
BKE
tim_brk
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