Figure 179. High-Resolution Timer Overview - ST STM32G4 Series Reference Manual

High-resolution timer (HRTIM)
Note: As a writing convention, references to the 6 timing units in the text and in registers are
generalized using the "x" letter, where x can be any value from A to F.
The block diagram of the timer is shown in
hrtim_in_sync[3:1]
hrtim_out_sync[3:1]
10
hrtim_adc_trg[10:1]
6
hrtim_dac_reset_trig [A:F]
6
hrtim_dac_step_trig[A:F]
3
hrtim_dac_trg[3:1]
7
hrtim_it[8:1]
6
hrtim_dma[7:1]
hrtim_ker_ck
hrtim_pclk
hrtim_eev1[4:1]
hrtim_eev10[4:1]
HRTIM_FLT[6:1],
hrtim_in_flt[6:1],
hrtim_sys_flt
804/2083

Figure 179. High-resolution timer overview

Master timer
Reset
Event
blanking
window
Reset
APB and
peripheral
interface Event
blanking
window
DMA burst
controller
Reset
Event
blanking
window
Reset
Event
blanking
window
Reset
Event
blanking
window
Reset
Event
blanking
External events
window
conditioning
10
6 (EEV1_muxout...EEV6_muxout)
6
Fault
conditioning
Figure 179.
hrtim_
upd_en[3:1]
5
1
TIMER A
4
4xCMP
2xCPT
10
1
TIMER B
4
4xCMP
2xCPT
10
1
TIMER C
4
4xCMP
Set/reset
2xCPT
crossbar
10
(a timer
controls
2 outputs)
1
TIMER D
4
4xCMP
2xCPT
10
1
TIMER E
4
4xCMP
2xCPT
10
1
TIMER F
4
4xCMP
2xCPT
10
5
RM0440 Rev 1
hrtim_ hrtim_
bm_trg bm_ck
Burst mode
controller
Run/idle
Run/idle
Run/idle
Output
stage
Run/idle
Run/idle
Run/idle
RM0440
HRTIM_CHA1
HRTIM_CHA2
HRTIM_CHB1
HRTIM_CHB2
HRTIM_CHC1
HRTIM_CHC2
HRTIM_CHD1
HRTIM_CHD2
HRTIM_CHE1
HRTIM_CHE2
HRTIM_CHF1
HRTIM_CHF2
MSv47425V3