Table 214. Eexfltr[3:0] Codes Depending On Udm Bit Setting; Figure 211. Repetition Counter Behavior In Up-Down Counting Mode - ST STM32G4 Series Reference Manual

RM0440
Figure 211
mode.
ROM[1:0] = 00
ROM[1:0] = 01
ROM[1:0] = 10
ROM[1:0] = 01
ROM[1:0] = 10
ROM[1:0] = 00
The dual channel DAC triggers are working as for the up-counting mode.
The event blanking and windowing differs so as to have the blanking or windowing done
within the output pulse, at a programmable time. The EExFLTR[3:0] codes are depending
on the UDM bit setting, as per the
blanking or windowing, the ROM[1:0] programming applies for defining when it is
generated.
EE1FLTR[3:0]
0010
0100
1101
1110
1111
below shows how the repetition counter is decremented in up-down counting

Figure 211. Repetition counter behavior in up-down counting mode

Counter
REP = 0
REP = 0
REP = 0
REP = 1
REP = 1
REP = 2

Table 214. EExFLTR[3:0] codes depending on UDM bit setting

Up-counting mode
(UDM = 0)
Blanking from counter reset/roll-over to
compare 2
Blanking from counter reset/roll-over to
compare 4
Windowing from counter reset/roll-over
to compare 2
Windowing from counter reset/roll-over
to compare 3
Windowing from another timing unit:
TIMWIN source (see Table 19 for details)
Table 214 below. Whenever the roll-over event is used for
RM0440 Rev 1
High-resolution timer (HRTIM)
Up/down-counting mode
(UDM = 1)
Blanking from compare 1 to compare 2,
only during the up-counting phase
Blanking from compare 3 to compare 4,
only during the up-counting phase
Windowing from compare 2 to compare
3, only during the up-counting phase
Windowing from compare 2 to compare
3, only during the down-counting phase
Windowing from compare 2 during the
up-counting phase to compare 3 during
the down-counting phase
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