Figure 58. Modec Read Access Waveforms; Figure 59. Modec Write Access Waveforms - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
Hide thumbs Also See for STM32G4 Series:
Table of Contents

Advertisement

RM0440
Mode C - NOR Flash - OE toggling
A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
A[25:0]
NADV
NEx
NOE
NWE
Data bus
The differences compared with Mode1 are the toggling of NOE and the independent read
and write timings.

Figure 58. ModeC read access waveforms

High
ADDSET HCLK cycles

Figure 59. ModeC write access waveforms

ADDSET HCLK cycles
RM0440 Rev 1
Flexible memory controller (FMC)
Memory transaction
Data driven by memory
DATAST HCLK cycles
Memory transaction
Data driven by controller
DATAST HCLK cycles
DATAHLD
HCLK cycles
MSv41682V1
DATAHLD +1
HCLK cycles
MSv41679V1
493/2083
531

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32G4 Series and is the answer not in the manual?

Table of Contents

Save PDF