ST STM32G4 Series Reference Manual page 1025

RM0440
26.5.78 HRTIM ADC post scaler register 1 (HRTIM_ADCPS1)
Address offset: 0x400
Reset value: 0x0000 0000
31 30 29
Res. Res. Res.
15 14 13
ADC3PSC[3:0]
rw rw rw
Bits 31:29 Reserved, must be kept at reset value.
Bits 28:24 ADC5PSC[4:0]: ADC 5 post scaler
Refer to ADC1PSC[4:0] description.
Bit 23 Reserved, must be kept at reset value.
Bits 22:18 ADC4PSC[4:0]: ADC 4 post scaler
Refer to ADC1PSC[4:0] description.
Bit 17 Reserved, must be kept at reset value.
Bits 16:12 ADC3PSC[4:0]: ADC 3 post scaler
Refer to ADC1PSC[4:0] description.
Bit 11 Reserved, must be kept at reset value.
Bits 10:6 ADC2PSC[4:0]: ADC 2 post scaler
Refer to ADC1PSC[4:0] description.
Bit 5 Reserved, must be kept at reset value.
Bits 4:0 ADC1PSC[4:0]: ADC 1 post scaler
This bit selects the ADC 1 Post scaler ratio.
28 27 26 25
ADC5PSC[4:0]
rw rw rw rw
12 11 10 9
Res.
rw rw rw
24 23 22
Res.
rw rw
8 7 6
ADC2PSC[4:0]
rw rw rw
RM0440 Rev 1
High-resolution timer (HRTIM)
21 20 19 18
ADC4PSC[4:0]
rw rw rw rw
5 4 3 2
Res. ADC1PSC[4:0]
rw rw rw
17 16
ADC3P
Res.
SC[4]
rw
1 0
rw rw
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