Table 287. Ccr And Arr Register Change Dithering Pattern; Figure 459. Pwm Dithering Pattern - ST STM32G4 Series Reference Manual
Advanced arm-based 32-bit mcus
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RM0440
Counter period
CCR1 value
Compare1 value
21
CCR2 value
Compare2 value
21
ARR value
Auto-Reload
41
value
The auto-reload and compare values increments are spread following specific patterns
described in the
distributed as evenly as possible and minimize the overall ripple.
-
LSB value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
Figure 459. PWM dithering pattern
1
2
3
4
5
20
20
20
20
20
21
20
21
40
40
40
41
Table 287
below. The dithering sequence is done to have increments
Table 287. CCR and ARR register change dithering pattern
1
2
3
-
-
-
+1
-
-
+1
-
-
+1
-
-
+1
-
-
+1
-
+1
+1
-
+1
+1
-
+1
+1
-
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
General-purpose timers (TIM15/TIM16/TIM17)
6
7
8
9
322
20
20
20
21
326
20
20
20
21
643
40
40
40
41
PWM period
4
5
6
7
8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+1
-
-
-
-
+1
-
-
-
-
+1
-
-
-
-
+1
-
-
-
-
+1
-
+1
-
-
+1
-
+1
-
-
+1
-
+1
-
-
+1
-
+1
-
-
+1
+1
+1
-
-
+1
+1
+1
-
+1
+1
+1
-
RM0440 Rev 1
10
11
12
13
14
20
20
20
20
20
20
21
20
21
20
40
40
40
40
40
9
10
11
12
13
-
-
-
-
-
-
-
-
-
-
+1
-
-
-
-
+1
-
-
-
-
+1
-
-
-
+1
+1
-
-
-
+1
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
15
16
20
20
20
20
40
40
MSv47467V1
14
15
16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+1
-
-
+1
-
-
+1
-
-
+1
-
+1
+1
-
+1
+1
-
1325/2083
1399
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