Table 192. Comp Register Map And Reset Values - ST STM32G4 Series Reference Manual

Comparator (COMP)
Bits 7:4 INMSEL[3:0]: Comparator x signal select for inverting input
Bits 3:1 Reserved, must be kept at reset value
Bit 0 EN: Comparator x enable
23.6.2 COMP register map
The following table summarizes the comparator registers.
The comparator registers share SYSCFG peripheral register base addresses.
Offset Register
COMP_C1CSR
0x00
Reset value
COMP_C2CSR
0x04
Reset value
COMP_C3CSR
0x08
Reset value
COMP_C4CSR
0x0C
Reset value
COMP_C5CSR
0x10
Reset value
742/2083
This bitfield controlled by software selects the signal for the inverting input COMPx_INM of
the comparator x, as shown in
This bit controlled by software enables the operation of comparator x:
0: Disable
1: Enable

Table 192. COMP register map and reset values

0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
Table 189: COMPx inverting input
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
RM0440 Rev 1
RM0440
assignment.
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0
0
0
0
0