Figure 165. Comparator Block Diagram - ST STM32G4 Series Reference Manual

Comparator (COMP)
23 Comparator (COMP)
23.1 COMP introduction
The device embeds up to seven ultra-fast analog comparators.
The comparators can be used for a variety of functions including:
•
Wake-up from low-power mode triggered by an analog signal,
•
Analog signal conditioning,
•
Cycle-by-cycle current control loop when combined with a PWM output from a timer.
23.2 COMP main features
• Each comparator has configurable plus and minus inputs used for flexible voltage
selection:
–
–
–
•
Programmable hysteresis
•
Output redirection to I/Os or to timer inputs for triggering break events for fast PWM
shutdowns
•
Output blanking for immunity to switching noise
• Per-channel interrupt generation with wake-up from Sleep and Stop modes
23.3 COMP functional description
23.3.1 COMP block diagram
The block diagram of one comparator channel front-end is shown in
Comparator block
COMPx_INP I/Os
COMPx_INM I/Os
736/2083
Multiplexed I/O pins
DAC channels
Internal reference voltage and three submultiple values (1/4, 1/2, 3/4) provided by
a scaler (buffered voltage divider)
diagram.

Figure 165. Comparator block diagram

INPSEL
COMPx_INP
COMPx_INM
INMSEL
DACx_OUTy
DACx_OUTy
V
REFINT
3/4 V
REFINT
1/2 V
REFINT
1/4 V
REFINT
HYST
+
VALUE
COMPx
-
RM0440 Rev 1
Figure 165:
GPIO
alternate
function
POLARITY COMPx_OUT
Wakeup EXTI line
interrupt
Polarity selection
TIMERS
RM0440
MSv47930V2