ST STM32G4 Series Reference Manual page 942

High-resolution timer (HRTIM)
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP1x[15:0]: Timer x compare 1 value
This register holds the compare 1 value.
This register holds either the content of the preload register or the content of the active register if
preload is disabled.
The compare value must be either null or above or equal to 3 periods of the f
if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
The null value is programmed following the use case described in
case.
942/2083 RM0440 Rev 1
clock, that is 0x60
HRTIM
Section : Null duty cycle exception
RM0440