Table 162. Oversampler Operating Modes Summary - ST STM32G4 Series Reference Manual

RM0440
Combined modes summary
The Table 162
Regular
Oversampling
ROVSE
1
1
1
1
1
1
1
0
20.4.30 Dual ADC modes
Dual ADC modes can be used in devices with two ADCs or more (see
In dual ADC mode the start of conversion is triggered alternately or simultaneously by the
ADCx master to the ADC slave, depending on the mode selected by the bits DUAL[4:0] in
the ADCx_CCR register.
Four possible modes are implemented:
•
Injected simultaneous mode
•
Regular simultaneous mode
•
Interleaved mode
•
Alternate trigger mode
It is also possible to use these modes combined in the following ways:
•
Injected simultaneous mode + Regular simultaneous mode
•
Regular simultaneous mode + Alternate trigger mode
•
Injected simultaneous mode + Interleaved mode
In dual ADC mode (when bits DUAL[4:0] in ADCx_CCR register are not equal to zero), the
bits CONT, AUTDLY, DISCEN, DISCNUM[2:0], JDISCEN, JQM, JAUTO of the ADC_CFGR
register are shared between the master and slave ADC: the bits in the slave ADC are
always equal to the corresponding bits of the master ADC.
To start a conversion in dual mode, the user must program the bits EXTEN, EXTSEL,
JEXTEN, JEXTSEL of the master ADC only, to configure a software or hardware trigger,
and a regular or injected trigger. (the bits EXTEN[1:0] and JEXTEN[1:0] of the slave ADC
are don't care).
below summarizes all combinations, including modes not supported.

Table 162. Oversampler operating modes summary

Oversampler
mode
Injected
Oversampling ROVSM
JOVSE 0 = continued
1 = resumed
0 0
0 0
0 1
0 1
1 0
1 1
1 1
1 X
RM0440 Rev 1
Analog-to-digital converters (ADC)
Triggered
Regular mode
TROVS
0 Regular continued mode
1 Not supported
0 Regular resumed mode
Triggered regular resumed
1
mode
X Not supported
Injected and regular resumed
0
mode
1 Not supported
X Injected oversampling
Comment
Figure 134).
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