Figure 491. Lptim Output Waveform, Single Counting Mode Configuration; Figure 492. Lptim Output Waveform, Single Counting Mode Configuration; And Set-Once Mode Activated (Wave Bit Is Set) - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0440

Figure 491. LPTIM output waveform, single counting mode configuration

LPTIM_ARR
Compare
PWM
- Set-once mode activated:
It should be noted that when the WAVE bit-field in the LPTIM_CFGR register is set, the Set-
once mode is activated. In this case, the counter is only started once following the first
trigger, and any subsequent trigger event is discarded as shown in

Figure 492. LPTIM output waveform, Single counting mode configuration

In case of software start (TRIGEN[1:0] = '00'), the SNGSTRT setting will start the counter for
one-shot counting.
Continous mode
To enable the continuous counting, the CNTSTRT bit must be set.
In case an external trigger is selected, an external trigger event arriving after CNTSTRT is
set will start the counter for continuous counting. Any subsequent external trigger event will
be discarded as shown in
In case of software start (TRIGEN[1:0] = '00'), setting CNTSTRT will start the counter for
continuous counting.
0
External trigger event

and Set-once mode activated (WAVE bit is set)

LPTIM_ARR
Compare
0
PWM
External trigger event
Figure
493.
RM0440 Rev 1
Low-power timer (LPTIM)
MSv39230V2
Figure
492.
Discarded trigger
MSv39231V2
1423/2083
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