ST STM32G4 Series Reference Manual page 1373

RM0440
Table 293. TIM15 register map and reset values (continued)
Register
Offset
name
TIM15_CCER
0x20
Reset value
TIM15_CNT
0x24
Reset value 0
TIM15_PSC
0x28
Reset value
TIM15_ARR
0x2C
Reset value
TIM15_RCR
0x30
Reset value
TIM15_CCR1
0x34
Reset value
TIM15_CCR2
0x38
Reset value
0x38 -
Reserved
0x40
TIM15_BDTR
0x44
Reset value
0x48 -
Reserved
0x50
TIM15_DTR2
0x54
Reset value
0x58 Reserved
TIM15_TISEL
0x5C
Reset value
0 0
RM0440 Rev 1
General-purpose timers (TIM15/TIM16/TIM17)
0 0 0 0 0
0 0 0 0 0
0 0 0 0 1 1 1 1 1
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Res.
BKF[3:0]
0 0 0 0 0 0 0 0 0
Res.
0 0
Res.
TI2SEL[3:0]
0
0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0
ARR[19:0]
1 1 1 1 1 1 1 1
REP[7:0]
0 0 0 0 0
CCR1[19:0]
0 0 0 0 0 0 0 0
CCR2[19:0]
0 0 0 0 0 0 0 0
LOCK
DT[7:0]
[1:0]
0 0 0 0 0 0 0 0
DTGF[7:0]
0 0 0 0 0
TI1SEL[3:0]
0 0 0 0
1373/2083
0 0 0
0 0 0
0 0 0
1 1 1
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
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