Advanced-control timers (TIM1/TIM8/TIM20)
The polarity of the direction signal on tim_ti1 is set with the CC1P bit: 0 corresponds to
positive polarity (up-counting when tim_ti1 is high and down-counting when tim_ti1 is low)
and CC1P = 1 corresponds to negative polarity (up-counting when tim_ti1 is low).
Counter x2 mode
Counter x1 mode
Directional Clock encoder mode
In the "directional clock" mode on
single one at once, depending on the direction, so as to have one up-counting clock line and
one down-counting clock line.
This mode is enabled with the SMS[3:0] bitfield in the TIMx_SMCR register, as following:
•
1100: x2 mode, the counter is updated on both rising and falling edges of any of the two
clock line. The CC1P and CC2P bits are coding for the clock idle state. CCxP = 0
corresponds to high-level idle state (refer to
corresponds to low-level idle state (refer to
•
1101: x1 mode, the counter is updated on a single clock edge, as per CC1P and CC2P
bit value. CCxP = 0 corresponds to falling edge sensitivity and high-level idle state
(refer to
level idle state (refer to
Counter x2 mode
Counter x1 mode
1106/2083
Figure 329. Direction plus clock encoder mode
tim_ti1
tim_ti2
6
7
6
7
Figure 330
below), CCxP = 1 corresponds to rising edge sensitivity and low-
Figure 331
Figure 330. Directional clock encoder mode (CC1P = CC2P = 0)
tim_ti1
tim_ti2
DIR bit
6
7
6
RM0440 Rev 1
8
9
10
11
8
Figure
330, the clocks are provided on two lines, with a
Figure 330
Figure 331
below).
8
9
10
11
7
8
10
9
8
7
9
8
7
below) and CCxP = 1
below).
10
9
8
7
6
7
6
RM0440
6
MSv62352V1
5
5
MSv62353V1
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