Table 307. Encoder Counting Scenarios - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
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Low-power timer (LPTIM)
Direction change is signalized by the two Down and Up flags in the LPTIM_ISR register.
Also, an interrupt can be generated for both direction change events if enabled through the
DOWNIE bit.
To activate the Encoder mode the ENC bit has to be set to '1'. The LPTIM must first be
configured in Continuous mode.
When Encoder mode is active, the LPTIM counter is modified automatically following the
speed and the direction of the incremental encoder. Therefore, its content always
represents the encoder's position. The count direction, signaled by the Up and Down flags,
correspond to the rotation direction of the encoder rotor.
According to the edge sensitivity configured using the CKPOL[1:0] bits, different counting
scenarios are possible. The following table summarizes the possible combinations,
assuming that Input1 and Input2 do not switch at the same time.
Active edge
Rising Edge
Falling Edge
Both Edges
The following figure shows a counting sequence for Encoder mode where both-edge
sensitivity is configured.
Caution:
In this mode the LPTIM must be clocked by an internal clock source, so the CKSEL bit must
be maintained to its reset value which is equal to '0'. Also, the prescaler division ratio must
be equal to its reset value which is 1 (PRESC[2:0] bits must be '000').
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Table 307. Encoder counting scenarios

Level on opposite
signal (Input1 for
Input2, Input2 for
Input1)
High
Low
High
Low
High
Low
RM0440 Rev 1
Input1 signal
Rising
Falling
Down
No count
Up
No count
No count
Up
No count
Down
Down
Up
Up
Down
RM0440
Input2 signal
Rising
Falling
Up
No count
Down
No count
No count
Down
No count
Up
Up
Down
Down
Up

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