Figure 377. Control Circuit In External Clock Mode 1 - ST STM32G4 Series Reference Manual

RM0440
1. Select the proper tim_ti2_in[15:0] source (internal or external) with the TI2SEL[3:0] bits
in the TIMx_TISEL register.
2. Configure channel 2 to detect rising edges on the tim_ti2 input by writing CC2S= '01 in
the TIMx_CCMR1 register.
3. Configure the input filter duration by writing the IC2F[3:0] bits in the TIMx_CCMR1
register (if no filter is needed, keep IC2F=0000).
Note: The capture prescaler is not used for triggering, so it does not need to be configured.
4. Select rising edge polarity by writing CC2P=0 and CC2NP=0 and CC2NP=0 in the
TIMx_CCER register.
5. Configure the timer in external clock mode 1 by writing SMS=111 in the TIMx_SMCR
register.
6. Select tim_ti2 as the input source by writing TS=00110 in the TIMx_SMCR register.
7. Enable the counter by writing CEN=1 in the TIMx_CR1 register.
When a rising edge occurs on tim_ti2, the counter counts once and the TIF flag is set.
The delay between the rising edge on tim_ti2 and the actual clock of the counter is due to
the resynchronization circuit on tim_ti2 input.
tim_cnt_ck, tim_psc_ck
External clock source mode 2
This mode is selected by writing ECE=1 in the TIMx_SMCR register.
The counter can count at each rising or falling edge on the external trigger input tim_etr_in.
Figure 378

Figure 377. Control circuit in external clock mode 1

tim_ti2
CEN
Counter register
TIF
gives an overview of the external trigger input block.
General-purpose timers (TIM2/TIM3/TIM4/TIM5)
34
Write TIF=0
RM0440 Rev 1
35 36
MSv62319V1
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1297