ST STM32G4 Series Reference Manual page 729

Advanced arm-based 32-bit mcus

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DAC channel1 sawtooth register (DAC_STR1)

Address offset: 0x58

Reset value: 0x0000 0000

Bits 31:16 STINCDATA1[15:0]: DAC channel1 sawtooth increment value (12.4 bit format)

Bits 15:13 Reserved, must be kept at reset value.

Bit 12 STDIR1: DAC channel1 sawtooth direction setting

This bit is written by software to select the direction of Sawtooth step direction

0: Decrement

1: Increment

Bits 11:0 STRSTDATA1[11:0]: DAC channel1 sawtooth reset value

DAC channel2 sawtooth register (DAC_STR2)

This register is available only on dual-channel DACs. Refer to

implementation.

Address offset: 0x5C

Reset value: 0x0000 0000

Bits 31:16 STINCDATA2[15:0]: DAC channel2 Sawtooth increment value (12.4 bit format)

Bits 15:13 Reserved, must be kept at reset value.

Bit 12 STDIR2: DAC channel2 sawtooth direction setting

This bit is written by software to select the direction of sawtooth step direction

0: Decrement

1: Increment

Bits 11:0 STRSTDATA2[11:0]: DAC channel2 sawtooth reset value

STINCDATA1[15:0]

STRSTDATA1[11:0]

STINCDATA2[15:0]

STRSTDATA2[11:0]

RM0440 Rev 1

Digital-to-analog converter (DAC)

Section 21.3: DAC

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