Advanced-control timers (TIM1/TIM8/TIM20)
Arming and re-arming break circuitry
The break circuitry (in input or bidirectional mode) is armed by default (peripheral reset
configuration).
The following procedure must be followed to re-arm the protection after a break (break2)
event:
•
The BKDSRM (BK2DSRM) bit must be set to release the output control
•
The software must wait until the system break condition disappears (if any) and clear
the SBIF status flag (or clear it systematically before re-arming)
•
The software must poll the BKDSRM (BK2DSRM) bit until it is cleared by hardware
(when the application break condition disappears)
From this point, the break circuitry is armed and active, and the MOE bit can be set to re-
enable the PWM outputs.
Other break inputs
Bidirectional
Break I/O
TIM_BKIN
27.3.20
Clearing the tim_ocxref signal on an external event
The tim_ocxref signal of a given channel can be cleared when a high level is applied on the
tim_ocref_clr_int input (OCxCE enable bit in the corresponding TIMx_CCMRx register set to
1). tim_ocxref remains low until the next update event (UEV) occurs. This function can only
1094/2083
Table 252. Break protection disarming conditions
MOE
(BK2BID)
0
0
0
1
Figure 317. Output redirection (tim_brk2 request not represented)
tim_brk_cmp1..7
AF input
AF
(active low)
controller
AF output
(open drain)
Vss
BKBID
(BK2DSRM)
0
1
1
X
tim_sys_brk
BKF[3:0]
Filter
BKIN inputs from
AF controller
Bidirectional
mode control logic
MOE
BKBID
BKBDSRM
RM0440 Rev 1
BKDSRM
Break protection state
X
0
1
X
SBIF flag
Software break
requests: BG
BKE
BKP
Application break requests
System break request
tim_brk request
RM0440
Armed
Armed
Disarmed
Armed
BIF flag
BRK
request
tim_brk
MSv62340V1
Need help?
Do you have a question about the STM32G4 Series and is the answer not in the manual?