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ST STM32G474 User Manual

ST STM32G474 User Manual

25 kw, dual active bridge bidirectional power converter for ev charging and battery energy storage systems
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25 kW, dual active bridge bidirectional power converter for EV charging and
Introduction
This reference design represents a complete solution for high power bidirectional DC-DC power converter in dual active bridge
topology based on ACEPACK2 SiC power modules. An STM32G474 MCU Mixed-Signal digital platform optimized for Digital
Power is used to control the power converter. The latest generation SiC power modules and high-frequency operation (100 kHz)
ensure very high performance and design optimization. Soft switching DAB behavior is managed by modulation techniques
according to load/voltage variation.
This reference design consists of the following separate modules:
•
STDES-DABBIDIRP: main power board with ACEPACK 2 SiC power modules, a full bridge A2F12M12W2-F1 and two
A2H6M12W3-F for primary HV side and secondary LV side, respectively. The power board design also includes bulk
capacitors, sensing sections, and auxiliary power supply.
•
STDES-DABBIDIRDF: driver board for full bridge ACEPACK 2 A2F12M12W2-F1 SiC power modules based on
STGAP2SiCS Galvanically isolated 4 A single gate driver for SiC MOSFETs
•
STDES-DABBIDIRDH: two driver boards for half bridges ACEPACK2 A2H6M12W3-F SiC power modules based on
STGAP2SiCS galvanically isolated 4 A single gate driver for SiC MOSFETs
•
STDES-PFCBIDIRC: control board based on the STM32G4 series microcontroller with connectors for communication and
programming, and test-points and status indicators for testing and monitoring.
The latest technology SiC MOSFETs power modules used at high switching frequency (100 kHz) and the topology structure
allow nearly 98% efficiency and the use of smaller and more cost-effective passive power components.
This high efficiency bidirectional isolated DC-DC converter is designed for several end applications such as electric vehicles
(EV) and industrial battery chargers, and industrial equipment requiring very high efficiency and reliability.
UM3198 - Rev 1 - December 2023
For further information contact your local STMicroelectronics sales office.
Figure 1.
STDES-DABBIDIR reference design board
battery energy storage systems
UM3198
User manual
www.st.com

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  • Page 1: Figure 1. Stdes-Dabbidir Reference Design Board

    This reference design represents a complete solution for high power bidirectional DC-DC power converter in dual active bridge topology based on ACEPACK2 SiC power modules. An STM32G474 MCU Mixed-Signal digital platform optimized for Digital Power is used to control the power converter. The latest generation SiC power modules and high-frequency operation (100 kHz) ensure very high performance and design optimization.

  • Page 2: Safety And Compliance Information

    UM3198 Safety and compliance information Safety and compliance information • The reference design uses voltage levels that can cause serious injury and even death. • Due to the high-power density, the components on the board as well as the heat sink can be heated to a very high temperature, which can cause a burning risk when touched directly.

  • Page 3: Overview

    UM3198 Overview Overview Features • Reference design modular kit: – Main power board – Driving board (1xHV side 2xLV side) – STM32G474RET3 control board • Dual active bridge DC-DC power converter: – Nominal DC input voltage 800 V – Nominal DC output voltage 400 V –...

  • Page 4: Main Characteristics

    UM3198 Overview Figure 2. STDES-DABBIDIR reference design overview Figure 3. STDES-DC2DCDAB block diagram Main characteristics Table 1. Main characteristics Description Symbol Min. Typ. Max. Unit Comments DCHV HV DC Voltage UM3198 - Rev 1 page 4/83...

  • Page 5: Dual Active Bridge Topology

    UM3198 Overview Description Symbol Min. Typ. Max. Unit Comments DCLV LV DC Voltage out MAX Maximum output power At nominal voltages Switching frequency Peak efficiency >98 At nominal voltages Dual active bridge topology The dual active bridge is a bidirectional, dc-dc converter that includes two full bridges, a high frequency transformer, energy transfer inductor, and dc-link capacitors.

  • Page 6: Figure 5. Sic Power Module Assembly

    UM3198 Overview Figure 5. SiC power module assembly UM3198 - Rev 1 page 6/83...

  • Page 7: Dab Converter Operation

    UM3198 DAB converter operation DAB converter operation high frequency transformer. To transfer power, time varying voltages v t = v t and v t = v DAB1 DAB2 The DAB converter contains two voltage sourced full bridge circuits that are connected to the inductor L and the must be provided by the full bridge circuits to both, the high frequency transformer, and the converter inductor L.

  • Page 8: Figure 7. Dab Operation (Combo)

    UM3198 DAB converter operation Figure 7. DAB operation (combo) UM3198 - Rev 1 page 8/83...

  • Page 9: Figure 8. Simplified Diagram Of Dab

    UM3198 DAB converter operation t = v t and v t = v t to simplify the analysis of the DAB converter. DAB1 DAB2 The HV and LV side full-bridge circuits can therefore be replaced by the respective voltage sources Figure 8.

  • Page 10: Figure 10. Power Transfer Vs Phase Shift In Dab

    UM3198 DAB converter operation ∫ t dt = nV 1 V 2 sin φ 2πf s L lk (11) Power transfer is modulated according to the amplitude of the phase shift, with maximum at φ = ± π As shown by the equation, the DAB allows power flow in both directions according to the sign of the phase shift. Figure 10.

  • Page 11: Figure 11. Average Model Of The Dab

    UM3198 DAB converter operation Figure 11. Average model of the DAB D 1 − D nV i 2Lf s D 1 − D nV o i, avg 2Lf s To obtain the small-signal model, perturbation is injected to define the effects of the parameters on the equation. i, avg i, avg i, avg...

  • Page 12: Figure 12. Simplified Small Signal Equivalent Circuit Of Dab Converter

    UM3198 DAB converter operation Figure 12. Simplified small signal equivalent circuit of DAB converter UM3198 - Rev 1 page 12/83...

  • Page 13: Stdes-Dabbidir Reference Design Overview

    UM3198 STDES-DABBIDIR reference design overview STDES-DABBIDIR reference design overview Power stage of the STDES-DABBIDIR reference design STDES-DABBIDIRP consists of a dual active bridge converter topology implementing ACEPACK 2 SiC power modules in the power section. The driving section is based on two different PCB modules to optimize the driving path of each module. Fan cooling is used to simplify the evaluation of the reference design platform.

  • Page 14: Control Stage Of The Stdes-Dabbidir Reference Design

    UM3198 STDES-DABBIDIR reference design overview Figure 15. STDES-DABBIDIRDH driver board Figure 14. STDES-DABBIDIRDF driver board based on based on 2xSTGAP2SIC 4xSTGAP2SIC Control stage of the STDES-DABBIDIR reference design The control stage is based on STM32G474RE MCU devices with high-performance Arm® Cortex®-M4 32-bit RISC core.

  • Page 15: Figure 16. Stdes-Dabbidir Fw Architecture

    Figure 16. STDES-DABBIDIR FW architecture The general purpose STDES-PFCBIDIR control board based on the STM32G474 MCU is suitable for various high-power applications. This control board supports additional communication and debugging features such as I2C, UART, status LEDs, and analog monitoring, to extend the usage of the MCU peripherals.

  • Page 16: Stdes-Dabbidir Hardware Implementation

    UM3198 STDES-DABBIDIR hardware implementation STDES-DABBIDIR hardware implementation Input/output requirements 5.1.1 Maximum input power The maximum input power related to high voltage is obtained according to maximum output (low-voltage side) P out_max = 29,4kW and worst-case efficiency considered. 28kW in_max η w (12) 5.1.2 Maximum DC input current...

  • Page 17: Figure 18. Hv Voltage Sensing Equivalent Circuit

    UM3198 STDES-DABBIDIR hardware implementation Figure 18. HV voltage sensing equivalent circuit. Figure 19. STDES-DABBIDIR HV sensing circuit To define the maximum high-voltage-side measurement, the maximum voltage range is considered. Table 2. HV-side input voltages Parameters Value Description Vin_nom 800 V Nominal input Voltage Vin_min 720 V...

  • Page 18: Voltage Sensing

    UM3198 STDES-DABBIDIR hardware implementation Note: Isolated op amp unity and voltage gain must be followed by proper signal conditioning to fulfill ADC range requirements. Table 3. HV sensing input and output voltage range Parameters Value Description out_max 3.3 V Maximum value of the voltage range of the microcontroller ADC in_max Op amp maximum input voltage | maximum output voltage of ISO op amp V out_max...

  • Page 19: Figure 21. Stdes-Dabbidir Lv Sensing Circuit

    UM3198 STDES-DABBIDIR hardware implementation Figure 21. STDES-DABBIDIR LV sensing circuit To define the maximum high voltage side measurement, the maximum voltage range is considered. Table 5. HV-side output voltages Parameters Value Description Vout_nom 450 V Nominal output Voltage Vout_min 250 V Min.

  • Page 20: Hv Current Sensing

    UM3198 STDES-DABBIDIR hardware implementation Table 7. STDES-DABBIDIR effective value of LV sensing 0V − 660V Parameters Value Description LV_range 0V − 3.3V LV voltage range ADC_range ADC signal range −3 V 5.07e Tv_LVDC conditioning circuit gain Bits 1240 ADC_Bits ADC peripheral digital gain factor with 12-bit precision and VDDA=3.3V Tv_LVDC 0Bits Bias term of conditioning circuit gain...

  • Page 21: Table 8. Hv-Side Current

    UM3198 STDES-DABBIDIR hardware implementation Table 8. HV-side current Max. input current at V = 720V and Pin_max = ± 29,4kW ±40.93A Parameters Value Description in_max in_min + 15%V = ± 40.93A*1.15 = ± 47.07 ≅ ± 48A DCHV DCHV DCIV The HV-side maximum voltage range is considered with +15% margin.

  • Page 22: Current Sensing

    UM3198 STDES-DABBIDIR hardware implementation Parameters Value Description 0.03437 Ti_HVDC conditioning circuit gain Bits 1240 ADC_Bits ADC peripheral digital gain factor with 12-bit precision and VDDA=3.3V 1.65V Ti_HVDC 2047Bits Bias term of conditioning circuit gain ADC_Bits Offset term of ADC peripheral Bits 42.65 Ti_HVDC_tot...

  • Page 23: Figure 25. Stdes-Dabbidir Lv Current Sensing Circuit

    UM3198 STDES-DABBIDIR hardware implementation Figure 25. STDES-DABBIDIR LV current sensing circuit To define the maximum low-voltage-side current measurement range, the maximum current range is considered. Table 11. LV-side current Max. LV-side current at V = 450V and Pin_max = ± 28kW ±62.22A Parameters Value...

  • Page 24: Magnetics Design Requirements

    UM3198 STDES-DABBIDIR hardware implementation = 4.22kΩ ∙ Y = 13.7kΩ ∙ 0.9498 = 13.01kΩ ∙ = 19.98kΩ 1 − X GAINopamp = = 1.6096 Finally, the transfer function is obtained 19.98kΩ 13.01kΩ R 2 + R 4 4.22kΩ + 19.98kΩ 13.7kΩ...

  • Page 25: Transformer Turn Ratio

    UM3198 STDES-DABBIDIR hardware implementation 5.3.1 Transformer turn ratio In order to optimize the operation of the high frequency transformer, transformer ratio is obtained from the primary V in_nom = 1.78 and secondary nominal voltages. V out_nom (19) 5.3.2 Total resonance inductance To design DAB resonance inductance, nominal power is considered.

  • Page 26: Auxiliary Inductance - Peak Magnetic Field Estimation

    UM3198 STDES-DABBIDIR hardware implementation 5.3.4 Auxiliary inductance - peak magnetic field estimation ΔB *800 = = 72.88* 1250*5*10 −6 N L A e f sw 7*1960*10 −6 100*10 3 350*5*10 = 2*92.9mT (28) −6 5.3.5 Transformer – Magnetizing inductance The magnetizing inductance of HFT does not participate in the active power transfer, so it is designed with a ≤...

  • Page 27: Figure 27. Frenetic 32011-04 Transformer Winding

    UM3198 STDES-DABBIDIR hardware implementation Figure 28. Frenetic 32011-04 Auxiliary inductor Figure 27. Frenetic 32011-04 Transformer winding windings The following figure provides a 3D view. Figure 29. 3D image of transformer Unique magnetic core elements were considered to reduce the volume and weight. UM3198 - Rev 1 page 27/83...

  • Page 28: Power Section

    UM3198 STDES-DABBIDIR hardware implementation Figure 31. 3D model of auxiliary inductor Figure 30. 3D model of transformer Power section The conduction losses are calculated using the rms switch currents IQ1 and IQ5 5.4.1 Power device current stress , and the LV-side switches, PS for the HV-side switches, cond cond...

  • Page 29: Power Switch Switching Losses

    UM3198 STDES-DABBIDIR hardware implementation = 4*R *IQ5 cond DS on = PS + PS The total switches conduction losses are obtained. cond cond cond 5.4.3 Power switch switching losses The calculation of the switching losses is more demanding as they do not only depend on the selected power MOSFETs themselves.

  • Page 30: Stdes-Dabbidir Control Implementation

    STM32G474 according to the phase shifting demand. In addition, “DAB Supervisor” blocks are proposed to manage other features such as protections, monitoring, and modulations techniques.

  • Page 31: Peripheral Configuration Stm32Cubemx

    UM3198 STDES-DABBIDIR control implementation An extensive range of generic and specific firmware modules are available to support digital power conversion. Figure 35 shows the general development flow to obtain power conversion used for STDES-PFCBIDIR firmware development. This workflow allows us to start from power conversion requirements. This information is reinterpreted in application specifications that contain information linked to the MCU peripheral and DPC application configuration.

  • Page 32: High-Resolution Timer

    UM3198 STDES-DABBIDIR control implementation Figure 36. STM32G474 MCU pinout configuration for STDES-DABBIDIR 6.2.1 High-resolution timer A brief representation of the high-resolution timer configuration is shown below. Accurate parameter configuration is visible in the STM32CubeMX project files. UM3198 - Rev 1...

  • Page 33: Figure 37. Generic Phase Shift - Hrtim Block Diagram

    UM3198 STDES-DABBIDIR control implementation Figure 37. Generic phase shift - HRTIM block diagram Figure 38. HRTIM pin assignment UM3198 - Rev 1 page 33/83...

  • Page 34: Adc Configuration And Triggering

    UM3198 STDES-DABBIDIR control implementation An example of the switching pattern managed according to HRTIM peripheral of the STM32G474 is shown below, with primary and secondary legs of the DAB topology synchronized to the phase shifting requirements of the Master Timer Compare Unit. Dead time insertion and nominal 50% duty cycle of each leg is also managed through hardware configuration of the A-B-C-D channels of the HRTIM.

  • Page 35: Figure 41. Adc Clock Source Selection (Stm32Cubemx)

    UM3198 STDES-DABBIDIR control implementation 6.2.2.1 ADC timing - actual configuration We use STM32CubeMX to select the clock sources for the ADC peripherals. Figure 41. ADC clock source selection (STM32CubeMX) = 170MHz sysclk f sysclk = 170MHz 170MHz ℎclk AHB psc (29) ADC 1 and ADC2 are requested for this application.

  • Page 36: Figure 43. Sps Adc Sampling Requirement

    UM3198 STDES-DABBIDIR control implementation 6.2.2.2 Trigger and sampling Considering the “clean” area available in single phase shift modulation (SPS), the total conversion time must be lower than a quarter of the switching period. Figure 43. SPS ADC sampling requirement > f PWM 7,5uSec adc trigger...

  • Page 37: Figure 45. Stm32Cubemx Adc2 Regular Conversion Configuration

    UM3198 STDES-DABBIDIR control implementation Figure 45. STM32CubeMX ADC2 regular conversion configuration Figure 46. HRTIM ADC trigger CubeMX configuration Figure 47. HRTIM compare unit enabled for ADC triggering To guarantee the proposed t adc trigger timed conversion request, an external trigger conversion is configured. Table 17.

  • Page 38: Configuration Files

    UM3198 STDES-DABBIDIR control implementation Phase PORT RANK FUNCTION TEMP ADC2 CH12 DMA1CH4 ADC2 IN12 Temp-INT ADC1 TEMP DMA1CH3 ADC1-TEMP 6.2.3 Configuration files STDES-DABBIDIR power converter configuration is based on two main configuration files, shown in the figure below: • “DPC_application_conf.h” contains the application-specific DEFINE (i.e., ADC gain factor PI regulator gain, FSM configuration, control reference value, etc.

  • Page 39: Figure 50. Finite State Machine Bubble Representation

    UM3198 STDES-DABBIDIR control implementation Figure 50. Finite state machine bubble representation The FSM firmware modules provide a specific “weak” function for any state. The weak function provides a simple change of state to the following state. If any state is not used, the FSM main function allows a bypass to move forward automatically (Figure 51).

  • Page 40: How To Manage The Stdes-Dabbidir Reference Design

    A fully integrated design environment like STM32CUBEIDE allows evaluation and management of software source code and STM32G474 peripheral configuration. In addition, thanks to STM32CubeMX, support for other IDEs such as EWARM and AMR Keil is available as well. Table 19.

  • Page 41: How To Connect The Stdes-Dabbidir

    Connect the Programmable DC e-Load in the top-right corner connectors. Polarity must be checked according to the image description. The control card based on STM32G474 MCU is directly powered by the main board. The required MCU 3.3V is provided by internal LDO.

  • Page 42: How To Set Up The Stdes-Dabbidir

    Connecting the STDES-DABBIDIR How to set up the STDES-DABBIDIR The MCU could be programmed, monitored, and debugged using different SW/HW tools. ST-Link V2/isol and a typical 20 to10-pin JTAG adapter is used to connect the platform with a PC. The following procedure shows how to flash and debug the reference platform from a generic configuration; referr to dedicated sections to configure the actual configuration for specific tests.

  • Page 43: Figure 54. St-Link/V2 Isol + Adapter

    UM3198 How to manage the STDES-DABBIDIR reference design Figure 55. ST-LINK/V2 ISOL connection Figure 54. ST-LINK/V2 ISOL + adapter Step 1. Install and configure the preferred IDEs Step 2. Apply 7V and 12V external supply voltage Step 3. Connect STlink hardware debugger Step 4.

  • Page 44: Figure 57. Iar Ewarm Debug Procedure

    UM3198 How to manage the STDES-DABBIDIR reference design Figure 57. IAR EWARM debug procedure Example 1 : Several parameters can be adapted in order to evaluate and customize the application operating condition. The main parameters are depicted in the next table showing the default configuration proposed in the source code firmware example.

  • Page 45: How To Operate The Stdes-Dabbidir

    UM3198 How to manage the STDES-DABBIDIR reference design In addition to the operating mode parameters, a dedicated parameter section is proposed for the protection feature configuration. The default configuration is also given. Table 21. Hardware protection firmware configuration defines Parameters Value type Default Unit...

  • Page 46: Figure 58. Mode 1 Test Configuration

    UM3198 How to manage the STDES-DABBIDIR reference design Figure 58. Mode 1 test configuration An example of the default configuration is given. Swathing frequency and dead time are configured in “DPC_Application_Conf.h” and the expected waveforms are provided. Step 1. Configure the firmware parameters and flash the MCU. Table 23.

  • Page 47: Mode 2 - Open Loop, Phase Shift Power Operation

    UM3198 How to manage the STDES-DABBIDIR reference design Table 24. Example of frequency and dead time configuration Parameters Location Value PWM_FREQ DPC_Application_Conf.h 100000 DPC_DT_DAB1 DPC_Application_Conf.h 0.4e-6 DPC_DT_DAB2 DPC_Application_Conf.h 0.4e-6 Figure 59. Typical PWM and driving voltages 7.6.2 Mode 2 – open loop, phase shift power operation. This test is for the power and sensing section of the application.

  • Page 48: Figure 60. Open Loop, Phase Shift Power Operation Vin=400V Vout=210V Ps=0.06 Iload=9A

    UM3198 How to manage the STDES-DABBIDIR reference design Step 4. Go to the debugging mode in the preferred IDE software. Step 5. Set to 0.06 in DAB. pDAB_CTRL.PhSh_CTRL_MAN_norm. Step 6. Slowly increase the DC power supply up to 400V. The eLoad voltage will also increase up to 210V. Step 7.

  • Page 49: Mode 3 - Closed Loop, Voltage Control

    UM3198 How to manage the STDES-DABBIDIR reference design Figure 61. Open loop, phase shift power operation Vin=800V Vout=420V PS=0.06 Iload=16A 7.6.3 Mode 3 – closed loop, voltage control This test allows evaluation of the overall performance in voltage control mode of the application. Power equipment (Programmable DC Power Supply and DC eDLoad) is required for this test.

  • Page 50: Figure 62. Open Loop, Phase Shift Power Operation Vin=800V Vout=330V(Vctrl) Iload=17A

    UM3198 How to manage the STDES-DABBIDIR reference design Step 8. The DC output voltage can also be adapted by changing “fDAB_VDC_RefNext_V”. The actual output voltage reference changes linearly according to the slew rate configuration. Step 9. If emergency shoot down is required, DPC_FSM_NEW_State can be set to “DPC_FSM_FAULT” to disable PWM as well as phase shifting and energy transfer.

  • Page 51: Mode 4 - Closed Loop, Current Control

    UM3198 How to manage the STDES-DABBIDIR reference design Figure 64. Open loop, phase shift power operation Vin=800V Vout=410V(VCTRL) Iload=31A 7.6.4 Mode 4 – closed loop, current control This test allows evaluation of the overall performance of the application in current control mode. Power equipment (Programmable DC Power Supply and DC eDLoad) is required for this test.
  • Page 52 UM3198 How to manage the STDES-DABBIDIR reference design Step 9. If emergency shoot down is required, DPC_FSM_NEW_State can be set to “DPC_FSM_FAULT” to disable PWM as well as phase shifting and energy transfer. UM3198 - Rev 1 page 52/83...

  • Page 53: Stdes-Dabbidir Results

    UM3198 STDES-DABBIDIR results STDES-DABBIDIR results This section provides an additional overview of the reference design. Charging mode waveforms Waveforms analysis at: • Vin=800V • Vout=400V • fsw=100kHz • IDCload=40Amps • Voltage regulation operating mode Figure 65. Switching waveform C1=DC load current C2=VDAB1 C3=VDAB2 C4=IDM7 C5=VDSM7 C6=VDSM8 C7=VGSM7 C8=ILsec Waveforms analysis at: •...

  • Page 54: Efficiency

    UM3198 STDES-DABBIDIR results Figure 66. Maximum power waveforms C1=DC load current C2=VDAB1 C3=VDAB2 C4=VDS_LV_HS C5= VDS_LV_LS C6=Iprim C7=VREFL C8=ILsec F3=VL Efficiency Efficiency characterization at: • Vin=800V • Vout=440V • fsw=100kHz • Voltage regulation operating mode • Iload=4.5-56.3 A (Constant current) Figure 67.

  • Page 55: Schematic Diagrams

    Schematic diagrams Figure 68. STDES-DABBIDIR - main board circuit schematic (1 of 6) VDD_3.3V VDD_7V_EXT VDD_7V LD29080DT50R VDD_7V_EXT VDD_5V VDD_5V VDD_3.3V VDD_7V J P 1 Dev3 VOUT LDL1117S 33R 30Ohm@ 100MHz 5.6k VDD_5V VOUT 5.6k 5.6k 30Ohm@ 100MHz VOUT1 + C6 5.6k + C1 33uF/25V...

  • Page 56: Figure 69. Stdes-Dabbidir - Main Board Circuit Schematic (2 Of 6)

    Figure 69. STDES-DABBIDIR - main board circuit schematic (2 of 6) S OLDER J UMP ER3 S OLDER J UMP ER3 S OLDER J UMP ER3 S OLDER J UMP ER3 P W M_S X_LS _1 P W M_S X_HS _1 P W M_DX_LS _1 P W M_DX_HS _1 GND_S X_HS _1...

  • Page 57: Figure 70. Stdes-Dabbidir - Main Board Circuit Schematic (3 Of 6)

    Figure 70. STDES-DABBIDIR - main board circuit schematic (3 of 6) J 11 J 12 G_S X_HS _2A G_DX_HS _2A J 61 S _S X_HS _2A S _DX_HS _2A J 60 6061-0-00-15-00-00-03-0 6061-0-00-15-00-00-03-0 J 13 J 14 G_S X_HS _2B G_DX_HS _2B J 62 J 63...

  • Page 58: Figure 71. Stdes-Dabbidir - Main Board Circuit Schematic (4 Of 6)

    Figure 71. STDES-DABBIDIR - main board circuit schematic (4 of 6) TP 66 TP 67 TES T P OINT TES T P OINT J 37 J 38 OUTA_DAB1 OUTA_DAB2 BUS _LEM_DC1+ BUS _LEM_DC1- BUS _LEM_DC2+ BUS _LEM_DC2- J 39 74651195 74651195 J 40 P OWER_P _1...

  • Page 59: Figure 72. Stdes-Dabbidir - Main Board Circuit Schematic (5 Of 6)

    Figure 72. STDES-DABBIDIR - main board circuit schematic (5 of 6) VDD_5V 30Ohm@100MHz VDD_5V LEM1 CAS R 15-NP TP 1 1uF/25V 100nF/25V Re f VDD_5V 30Ohm@100MHz TP 2 TP 3 5V_DC1 N.M. P OWER_P _1 VDD_5V Te s tP oint_Ring 10K-0.1% N.M.

  • Page 60: Figure 73. Stdes-Dabbidir - Main Board Circuit Schematic (6 Of 6)

    Figure 73. STDES-DABBIDIR - main board circuit schematic (6 of 6) J 76 VDD_5V R131 TP 42 VDD_5V NTC_HV+ VDD_re f_NTC_HV Con2 VDD_5V Te s tP oint_Ring Te s tP oint_Ring J 47 TP 43 R108 22Ohm @ 100MHz 100nF/25V R132 NTC_HV- 5.6k...

  • Page 61: Figure 74. Stdes-Dabbidir - Driver Board For Full Bridge Circuit Schematic

    Figure 74. STDES-DABBIDIR - driver board for full bridge circuit schematic TP 1 Te s tP o in t VH_ S X_ HS VDD_ DR IVER VH_ S X_ HS 3 0 Oh m @ 1 0 0 MHz 1 u F 1 0 0 n F 1 n F/5 0 V 2 .2 u F...

  • Page 62: Figure 75. Stdes-Dabbidir - Driver Board For Half Bridge Circuit Schematic (1 Of 2)

    Figure 75. STDES-DABBIDIR - driver board for half bridge circuit schematic (1 of 2) TP 1 5000 VDD_DRIVER VDD_DRIVER VH_LS VDD_12V VDD_12V 30Ohm@100MHz VDD_DRIVER 100nF VH_LS 1uF/25V VL_LS 2.2uF 0.1uF 22uF 2S TF1360 P WM_LS TP 2 G_LS 5000 TP 3 5000 G_LS TP 4...

  • Page 63: Figure 77. Stdes-Dabbidir - Control Board Circuit Schematic

    Figure 77. STDES-DABBIDIR - control board circuit schematic TP 1 Te s tP o in t VH_ S X_ HS VDD_ DR IVER 3 0 Oh m @ 1 0 0 MHz VH_ S X_ HS 1 u F 1 0 0 n F 1 n F/5 0 V 2 .2 u F 2 .2 u F...

  • Page 64: Bill Of Materials

    UM3198 Bill of materials Bill of materials Table 28. STDES-DABBIDIR bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code Table 29. Main Not available for separate board bill of Main board sale materials Table 30. Driver board for full Driver board for Not available for separate bridge bill of...
  • Page 65 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code CAPACITOR C36 C54 1nF/16V CERAMIC SMD WURTH 885012006029 0603 CAPACITOR C171 C173 Würth 100nF 25V CERAMIC SMD 885012206071R C175 Elektronik 0603 CAPACITOR C172 C174 Würth 1uF 25V CERAMIC SMD 885012206076 C176 Elektronik...
  • Page 66 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code Power to the J37 J38 J39 J40 Board 10MM 74651195 WURTH 74651195 J41 J42 J45 J46 40A SOLDER SCREW M4 CONN TERM J47 J76 Con2 BLOCK 2POS Wurth 691213510002 5.08MM PCB CONN TERM...
  • Page 67 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code CHIP RESISTOR 1.65K-0.1% SMD 1% 1/10W 0603 CHIP R21 R26 R42 RESISTOR 1.8K SMD 1% 1/10W 0603 CHIP RESISTOR SMD 1% 1/10W 0603 CHIP RESISTOR 20K-0.1% SMD 1% 1/10W 0603 CHIP RESISTOR...
  • Page 68 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code CHIP RESISTOR SMD 1% 1/10W 0603 CHIP RESISTOR SMD 2512 CHIP R108 R119 RESISTOR R125 SMD 1% 1/10W 0603 CHIP R110 R120 RESISTOR 1.07k-0.1% R126 SMD 1% 1/10W 0603 CHIP R111 R121...
  • Page 69 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code TP42 TP43 Polo terminale TP44 TP45 RS Pro, diam. TP46 TP47 TestPoint_Ring foro 1mm, TP63 TP64 Bronzo TP65 fosforoso TP48 TP49 TP50 TP51 TP52 TP53 TP54 TP55 TP56 TP57 TP58 TP59 PC TEST TP60 TP61...
  • Page 70 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code SENS TEMP STLM20W87F, ANLG VOLT STLM20W87F SOT323-5L SOT-323-5 IC OPAMP GP TSV911IYLT, U27 U30 U32 8MHZ RRO TSV911IYLT SOT23-5L SOT23-5 IC VREF TLVH431AIL3T, U29 U31 U33 SHUNT ADJ TLVH431AIL3T SOT23 SOT23-3...
  • Page 71 JP4 JP5 JP6 JP7 JP8 JP9 IC & JP10 JP11 Component JP12 JP13 Mill-Max 3560-1-00-15-00-00-03-0 Sockets .060" JP14 JP15 Dia St Pins JP16 JP17 JP18 JP19 JP20 FIXED IND 0805 (2012 L1 L2 L3 L4 22UH 130MA Taiyo Yuden LBC2012T220M Metric) 3.7 OHM SMD...

  • Page 72: Table 31. Driver Board For Half Bridge Bill Of Materials

    UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 0.100" Dia x TP14 TP15 TEST POINT 0.180" L TP16 TP17 PC MINI .040"D (2.54mm x TP18 TP19 4.57mm) TP20 TP21...
  • Page 73 JP1 JP2 JP3 JP4 JP5 JP6 IC & JP7 JP8 JP9 Component JP10 JP11 Mill-Max 3560-1-00-15-00-00-03-0 Sockets .060" JP12 JP13 Dia St Pins JP14 JP15 JP16 FIXED IND 0805 (2012 L1 L2 22UH 130MA Taiyo Yuden LBC2012T220M Metric) 3.7 OHM SMD...
  • Page 74 UM3198 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code TP1 TP2 TP3 TP4 TP5 TP6 0.100" Dia x TEST POINT TP7 TP8 TP9 0.180" L PC MINI .040"D TP10 TP11 (2.54mm x TP12 TP13 4.57mm) TP14 Galvanically 8-SOIC (0.295", isolated 4 A U1 U2...
  • Page 75 UM3198 Bill of materials Item Q.ty Ref. Value Description Manufacturer Order code Solder Jumper Solder Jumper JP1,JP7 3JP_pcb Solder Jumper Selector Selector Selector Solder Jumper Solder Jumper STRIP_2X3 Solder Jumper Selector Selector Selector 4 Way, 1 Row, Straight Pin Wurth 61300411121 Header 4 Way, 1 Row,...
  • Page 76 UM3198 Bill of materials Item Q.ty Ref. Value Description Manufacturer Order code LD29080S33R, LDO Voltage LD29080S33R PPACK 5 Regulators STM32G474RE Tx_3TTC_EVAL STM32G474RE STM32G474RE , LQFP 64 10x10x1.4 mm Dual-Element ESDAL, Uni-Directional ESDA6V1L SOT23-3L TVS Diode PCB FR4- 4 FR4 4 LAYER Layer size 98x48x1.6mm UM3198 - Rev 1...

  • Page 77: Revision History

    UM3198 Revision history Table 33. Document revision history Date Version Changes 04-Dec-2023 Initial release. UM3198 - Rev 1 page 77/83...

  • Page 78: Table Of Contents

    UM3198 Contents Contents Safety and compliance information ..........2 Overview .
  • Page 79 UM3198 Contents 5.4.3 Power switch switching losses ..........29 STDES-DABBIDIR control implementation .
  • Page 80 STM32G474 MCU pinout configuration for STDES-DABBIDIR ........
  • Page 81 ST-LINK/V2 ISOL connection ........
  • Page 82 UM3198 List of tables List of tables Table 1. Main characteristics ..............4 Table 2.
  • Page 83 ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’...

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