Figure 335. Counter Reading With Index Gated On Channel A (Ipos[1:0] = 11); Figure 336. Counter Reading With Index Ungated (Ipos[1:0] = 00) - ST STM32G4 Series Reference Manual

Advanced arm-based 32-bit mcus
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Advanced-control timers (TIM1/TIM8/TIM20)

Figure 335. Counter reading with index gated on channel A (IPOS[1:0] = 11)

The
Figure 336.
mode. The arrows are indicating on which transition is the index event generated.
The
Figure 337.
alignment scenario. The arrows are indicating on which transition is the index event
generated.
1110/2083
Channel A
Channel B
Index
DIR bit
Counter
5 6 7 0 1 2 3 4 5
below presents waveforms and corresponding values for the ungated

Figure 336. Counter reading with index ungated (IPOS[1:0] = 00)

Channel A
Channel B
Index
DIR bit
Counter
3 4 5 6 7 0 1 2 3
below shows how the 'gated on A & B' mode is handled, for various pulse
6
5 4 3 2 1 0 7 6 5 4 3 2 1
4
3 2 1 0 7 6 5 4 3 2 1 0 7
RM0440 Rev 1
RM0440
MSv45768V1
MSv45769V1

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