RM0440
The following procedure must be followed to re-arm the protection after a break event:
•
The BKDSRM bit must be set to release the output control
•
The software must wait until the system break condition disappears (if any) and clear
the SBIF status flag (or clear it systematically before re-arming)
•
The software must poll the BKDSRM bit until it is cleared by hardware (when the
application break condition disappears)
From this point, the break circuitry is armed and active, and the MOE bit can be set to re-
enable the PWM outputs.
Other break inputs
Bidirectional
Break I/O
TIM_BKIN
29.4.17
Clearing the tim_ocxref signal on an external event
The tim_ocxref signal of a given channel can be cleared when a high level is applied on the
tim_ocref_clr_int input (OCxCE enable bit in the corresponding TIMx_CCMRx register set to
1). tim_ocxref remains low until the next update event (UEV) occurs. This function can only
be used in Output compare and PWM modes. It does not work in Forced mode.
The tim_ocref_clr_int input can be selected among several inputs, as shown on
below.
Figure 467. Output redirection
tim_brk_cmp1..7
AF input
AF
(active low)
controller
AF output
(open drain)
Vss
MOE
Figure 468. tim_ocref_clr input selection multiplexer
tim_ocref_clr0
tim_ocref_clr1
tim_ocref_clr2
tim_ocref_clr3
tim_ocref_clr4
tim_ocref_clr5
tim_ocref_clr6
tim_ocref_clr7
General-purpose timers (TIM15/TIM16/TIM17)
tim_sys_brk
BKF[3:0]
Filter
BKIN inputs from
Application break requests
AF controller
Bidirectional
mode control logic
BKBID
BKBDSRM
TIMx_AF2
OCRSEL[2:0]
RM0440 Rev 1
SBIF flag
Software break
requests: BG
BKE
BKP
System break request
tim_brk request
tim_ocref_clr_int
BIF flag
BRK
request
tim_brk
MSv62340V1
Figure 468
MSv62369V1
1335/2083
1399
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