Figure 188. Timer A Timing Unit Capture Circuitry - ST STM32G4 Series Reference Manual

RM0440
CMP1
CMP2
Timer B
TB1 set
TB1 reset
Timer C
Timer D
Timer E
Timer F
External events 1..10
Timer A Update
Software
Auto-delayed mode
This mode allows to have compare events generated relatively to capture events, so that for
instance an output change can happen with a programmed timing following a capture. In
this case, the compare match occurs independently from the timer counter value. It enables
the generation of waveforms with timings synchronized to external events without the need
of software computation and interrupt servicing.
As long as no capture is triggered, the content of the HRTIM_CMPxR register is ignored (no
compare event is generated when the counter value matches the compare value. Once the
capture is triggered, the compare value programmed in HRTIM_CMPxR is summed with the
captured counter value in HRTIM_CPTxyR, and it updates the internal auto-delayed
compare register, as seen on
the timing unit and cannot be read. The HRTIM_CMPxR preload register is not modified
after the calculation.
This feature is available only for compare 2 and compare 4 registers. compare 2 is
associated with capture 1, while compare 4 is associated with capture 2. HRTIM_CMP2xR
and HRTIM_CMP4xR compares cannot be programmed with a value below 3 f
periods, as in the regular mode.

Figure 188. Timer A timing unit capture circuitry

4
Capture 1
Trigger
4
selection
4
(OR)
4
10
f
HRTIM
Figure
CPT1
(IRQ & DMA)
Prescaler
189. The auto-delayed compare register is internal to
RM0440 Rev 1
High-resolution timer (HRTIM)
Capture 1 register
Capture
Timer A counter
HRTIM
MS32265V1
clock
823/2083
1040