ST STM32G4 Series Reference Manual page 467

Advanced arm-based 32-bit mcus

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Bits 31:16 Reserved

Bits 15:8 X2_BUF_SIZE: Size of X2 buffer in 16-bit words. This field can not be modified when a

function is ongoing (START = 1)

Bits 7:0 X2_BASE: Base address of X2 buffer. The X2 buffer base address can be modified while

START=1, for example to change coefficient values. The filter should be stalled when doing

this, since changing the coefficients while a calculation is ongoing will affect the result.

FMAC Y Buffer Configuration register (FMAC_YBUFCFG)

Address offset: 0x08

Reset value: 0x0000 0000

This register can only be modified if START = 0 in the FMAC_PARAM register.

Bits 31:26 Reserved

Bits 25:24 EMPTY_WM: Watermark for buffer empty flag. Defines the threshold for setting the Y buffer

empty flag when operating in circular mode. The flag will be set if the number of unread values

in the buffer is less than 2

Setting a threshold greater than 1 allows several data to be transferred from the buffer under

one interrupt.

Threshold should be set to 1 if DMA read requests are enabled (DMAREN = 1 in FMAC_CR

Bits 23:16 Reserved

Bits 15:8 Y_BUF_SIZE: Size of Y buffer in 16-bit words.

For FIR filters, the minimum buffer size is 1 (+ the watermark threshold). For IIR filters the

minimum buffer size is the number of feedback taps (+ the watermark threshold).

Bits 7:0 Y_BASE: Base address of Y buffer

0: Threshold = 1

1: Threshold = 2

2: Threshold = 4

3: Threshold = 8

RM0440 Rev 1

Filter Math Accelerator (FMAC)

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