Table 172. Hfsel Description; Figure 156. Timing Diagram For Conversion With Trigger Disabled Ten = 0 - ST STM32G4 Series Reference Manual

Digital-to-analog converter (DAC)
21.4.5 DAC conversion
The DAC_DORx cannot be written directly and any data transfer to the DAC channelx must
be performed by loading the DAC_DHRx register (write operation to DAC_DHR8Rx,
DAC_DHR12Lx, DAC_DHR12Rx, DAC_DHR8RD, DAC_DHR12RD or DAC_DHR12LD).
Data stored in the DAC_DHRx register are automatically transferred to the DAC_DORx
register after one dac_hclk clock cycle, if no hardware trigger is selected (TENx bit in
DAC_CR register is reset). However, when a hardware trigger is selected (TENx bit in
DAC_CR register is set) and a trigger occurs, the transfer is performed three dac_hclk clock
cycles after the trigger signal.
When DAC_DORx is loaded with the DAC_DHRx contents, the analog output voltage
becomes available after a time t
analog output load.
HFSEL bits of DAC_MCR must be set when dac_hclk clock speed is faster than 80 MHz. It
adds an extra delay to the transfer from DAC_DHRx register to DAC_DORx register.
Refer to
bits and dac_hclk clock frequency.
If the data is updated or a software/hardware trigger event occurs during the non-allowed
period, the peripheral behavior is unpredictable.
The above timing is only related to the limitation of the DAC interface. Refer also to the
t
SETTLING
HFSEL[1:0]
00
01
10
11
1. Refer to the device datasheet for the value of the maximum AHB frequency.

Figure 156. Timing diagram for conversion with trigger disabled TEN = 0

690/2083
Table 172 for the limitation of the DAC_DORx update rate depending on HFSEL
parameter value in the product datasheet

Table 172. HFSEL description

AHB frequency
≤ 80 MHz
>80 MHz
>160 MHz
Reserved
dac_pclk
DHR
DOR
that depends on the power supply voltage and the
SETTLING
DAC_DOR update rate up to 3 AHB clock cycles
(1)
DAC_DOR update rate up to 5 AHB clock cycles
DAC_DOR update rate up to 7 AHB clock cycles
-
0x1AC
0x1AC
t SETTLING
RM0440 Rev 1
RM0440
Function
Output voltage
available on DAC_OUT pin
MS45319V1