Table 216. Output Set/Reset Latency And Jitter Versus External Event Operating Mode - ST STM32G4 Series Reference Manual

High-resolution timer (HRTIM)

Table 216. Output set/reset latency and jitter versus external event operating mode

EExFAST
0
1
The EExFAST mode is only available with level-sensitive programming (EExSNS[1:0] = 00);
the edge-sensitivity cannot be programmed.
It is possible to apply event filtering to external events (both blanking and windowing with
EExFLTR[3:0] != 0000, see
postponed mode is not supported, neither the windowing timeout feature.
Note: The external event configuration (source and polarity) must not be modified once the related
EExFAST bit is set.
A fast external event cannot be used to toggle an output: if must be enabled either in
HRTIM_SETxyR or HRTIM_RSTxyR registers, not in both.
When a set and a reset event - from 2 independent fast external events - occur
simultaneously, the reset has the highest priority in the crossbar and the output becomes
inactive.
When EExFAST bit is set, the output cannot be changed during the 11 f
following the external event.
Figure 214
for output set/reset and counter reset.
848/2083
Response time
latency
5 to 6 cycles of f
HRTIM
clock
Minimal latency
(depends whether the
comparator or digital
input is used)
Section
and Figure 215 give practical examples of the reaction time to external events,
RM0440 Rev 1
Response time jitter
1 cycles of f
HRTIM
clock
Minimal jitter
26.3.9). In this case, EExLTCHx bit must be reset: the
Jitter on output pulse
(counter reset by ext. event)
No jitter, pulse width maintained with
high-resolution
1 cycle of f clock jitter pulse width
HRTIM
resolution down to t
HRTIM
HRTIM
RM0440
clock periods