ST STM32G4 Series Reference Manual page 657

RM0440
Bits 11:10 EXTEN[1:0]: External trigger enable and polarity selection for regular channels
These bits are set and cleared by software to select the external trigger polarity and enable the
trigger of a regular group.
00: Hardware trigger detection disabled (conversions can be launched by software)
01: Hardware trigger detection on the rising edge
10: Hardware trigger detection on the falling edge
11: Hardware trigger detection on both the rising and falling edges
Note: The software is allowed to write these bits only when ADSTART=0 (which ensures that no
regular conversion is ongoing).
Bits 9:5 EXTSEL[4:0]: External trigger selection for regular group
These bits select the external event used to trigger the start of conversion of a regular group:
00000: Event 0
00001: Event 1
00010: Event 2
00011: Event 3
00100: Event 4
00101: Event 5
00110: Event 6
00111: Event 7
...
11111: Event 31
Note: The software is allowed to write these bits only when ADSTART=0 (which ensures that no
regular conversion is ongoing).
Bits 4:3 RES[1:0]: Data resolution
These bits are written by software to select the resolution of the conversion.
00: 12-bit
01: 10-bit
10: 8-bit
11: 6-bit
Note: The software is allowed to write these bits only when ADSTART=0 and JADSTART=0 (which
ensures that no conversion is ongoing).
RM0440 Rev 1
Analog-to-digital converters (ADC)
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