Figure 248. Adc Trigger Selection Overview - ST STM32G4 Series Reference Manual

RM0440
Master Cmp1..4 + PER
External Events 1..5
TimerA Cmp3,4 + PER + RST
TimerB Cmp3,4 + PER + RST
TimerC Cmp3,4 + PER
TimerD Cmp3,4 + PER
TimerE Cmp3,4 + PER
TimerF Cmp3,4 + PER + RST
Master update
Timer A update
Timer B update
Timer C update
Timer D update
Timer E update
Timer F update
The ADC triggers 5 to 10 are configured in the HRTIM_ADCER register, as shown on
Figure 249. The ADC triggers 5/7/9 and 6/8/10 are using the same source set.
A single source can be selected at once for these triggers (1 out of 32 possible events).

Figure 248. ADC trigger selection overview

hrtim_adc
_trg1
5
5
ADC
5
Trigger 1
5
OR of
multiple
4
sources
4
4
Trigger 1
4
Update
AD1USRC[2:0]
Sources in bold are available only on Trigger 1,3 or trigger 2,4
RM0440 Rev 1
hrtim_adc
_trg3
Master Cmp1..4 + PER
External Events 6..10
TimerA Cmp2,4 + PER
ADC
TimerB Cmp2,4 + PER
Trigger 3
OR of TimerC Cmp2,4 + PER + RST
multiple
sources
TimerD Cmp2,4 + PER + RST
TimerE Cmp2,3,4 + RST
TimerF Cmp2,3,4 + PER
Trigger 3
Update
AD2USRC[2:0]
AD3USRC[2:0]
High-resolution timer (HRTIM)
hrtim_adc hrtim_adc
_trg2 _trg4
5
5
ADC ADC
4
Trigger 2 Trigger 4
4
OR of OR of
multiple multiple
5
sources sources
5
4
Trigger 2 Trigger 4
4
Update Update
AD4USRC[2:0]
MSv47437V2
895/2083
1040