Table 185. Dac Register Map And Reset Values - ST STM32G4 Series Reference Manual
Advanced arm-based 32-bit mcus
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- Reference manual (2126 pages) ,
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RM0440
21.7.24
DAC register map
Table 185
Register
Offset
name
DAC_CR
0x00
Reset value
0
DAC_
SWTRGR
0x04
Reset value
DAC_
DHR12R1
0x08
Reset value
DAC_
DHR12L1
0x0C
Reset value
0
0
DAC_
DHR8R1
0x10
Reset value
DAC_
DHR12R2
0x14
Reset value
DAC_
DHR12L2
0x18
Reset value
0
0
DAC_
DHR8R2
0x1C
Reset value
DAC_
DHR12RD
0x20
Reset value
DAC_
DHR12LD
0x24
Reset value
0
0
DAC_
DHR8RD
0x28
Reset value
DAC_
DOR1
0x2C
Reset value
DAC_
DOR2
0x30
Reset value
summarizes the DAC registers.
Table 185. DAC register map and reset values
0
0
0
0
0
0
0
0
DACC1DHRB[11:0]
0
0
0
0
0
0
DACC1DHRB[11:0]
0
0
0
0
0
0
0
0
DACC2DHRB[11:0]
0
0
0
0
0
0
DACC2DHRB[11:0]
0
0
0
0
0
0
0
0
DACC2DHR[11:0]
0
0
0
0
0
0
DACC2DHR[11:0]
0
0
0
0
0
0
0
0
DACC1DORB[11:0]
0
0
0
0
0
0
DACC2DORB[11:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DACC1DHRB[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
DACC2DHRB[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
DACC2DHR[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RM0440 Rev 1
Digital-to-analog converter (DAC)
0
0
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
0
DACC1DHR[7:0]
0
0
0
0
0
0
0
0
DACC2DHR[11:0]
0
0
0
0
0
0
DACC2DHR[11:0]
0
0
0
0
0
0
0
0
DACC2DHR[7:0]
0
0
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
0
DACC1DHR[7:0]
0
0
0
0
0
0
0
0
DACC1DOR[11:0]
0
0
0
0
0
0
DACC2DOR[11:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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