Table 308. Effect Of Low-Power Modes On The Lptim; Figure 495. Encoder Mode Counting Sequence - ST STM32G4 Series Reference Manual

RM0440
31.4.15 Debug mode
When the microcontroller enters debug mode (core halted), the LPTIM counter either
continues to work normally or stops, depending on the DBG_LPTIM_STOP configuration bit
in the DBG module.
31.5 LPTIM low-power modes
Sleep
Low-power run
Low-power sleep
Stop 0 / Stop 1
Standby
Shutdown

Figure 495. Encoder mode counting sequence

T1
T2
Counter
up

Table 308. Effect of low-power modes on the LPTIM

Mode
No effect. LPTIM interrupts cause the device to exit Sleep mode.
No effect.
No effect. LPTIM interrupts cause the device to exit the Low-power sleep
mode.
No effect when LPTIM is clocked by LSE or LSI. LPTIM interrupts cause
the device to exit Stop 0 and Stop 1.
The LPTIM peripheral is powered down and must be reinitialized after
exiting Standby or Shutdown mode.
down
Description
RM0440 Rev 1
Low-power timer (LPTIM)
up
MS32491V1
1429/2083
1441