ST STM32G4 Series Reference Manual page 1006

High-resolution timer (HRTIM)
Bits 4:3 EE6SNS[1:0]: External event 6 sensitivity
Refer to EE1SNS[1:0] description.
Bit 2 EE6POL: External event 6 polarity
Refer to EE1POL description.
Bits 1:0 EE6SRC[1:0]: External event 6 source
Refer to EE1SRC[1:0] description.
26.5.65 HRTIM timer external event control register 3 (HRTIM_EECR3)
Address offset: 0x3B8
Reset value: 0x0000 0000
31 30 29
EEVSD[1:0] Res. Res.
rw rw
15 14 13
EE8F[3:0]
rw rw rw
Bits 31:30 EEVSD[1:0]: External event sampling clock division
This bitfield indicates the division ratio between the timer clock frequency (f
event signal sampling clock (f
00: f
EEVS
01: f
EEVS
10: f
EEVS
11: f
EEVS
Bits 29:28 Reserved, must be kept at reset value.
Bits 27:24 EE10F[3:0]: External event 10 filter
Refer to EE6F[3:0] description.
Bits 23:22 Reserved, must be kept at reset value.
Bits 21:18 EE9F[3:0]: External event 9 filter
Refer to EE6F[3:0] description.
Bits 17:16 Reserved, must be kept at reset value.
Bits 15:12 EE8F[3:0]: External event 8 filter
Refer to EE6F[3:0] description.
Bits 11:10 Reserved, must be kept at reset value.
1006/2083
28 27 26 25
EE10F[3:0]
rw rw rw
12 11 10 9
Res. Res.
rw rw
EEVS
=f
HRTIM
=f / 2
HRTIM
=f / 4
HRTIM
=f / 8
HRTIM
24 23 22
Res. Res.
rw
8 7 6
EE7F[3:0]
rw rw rw
) used by the digital filters.
RM0440 Rev 1
21 20 19 18
EE9F[3:0]
rw rw rw rw
5 4 3 2
Res. Res. EE6F[3:0]
rw rw
) and the external
HRTIM
RM0440
17 16
Res. Res.
1 0
rw rw