Advanced-control timers (TIM1/TIM8/TIM20)
Table 249. CCR and ARR register change dithering pattern (continued)
LSB value
0111
1000
1001
1010
1011
1100
1101
1110
1111
The dithering mode is also available in center-aligned PWM mode (CMS bits in TIMx_CR1
register are not equal to '00'). In this case, the dithering pattern is applied over 8 consecutive
PWM periods, considering the up and down counting phases as shown in the
below.
Figure 305. Dithering effect on duty cycle in center-aligned PWM mode
Table 250
Table 250. CCR register change dithering pattern in center-aligned PWM mode
LSB
1
value
Up
Dn
0000
-
-
0001
+1
-
0010
+1
-
0011
+1
-
0100
+1
-
0101
+1
-
0110
+1
-
1080/2083
1
2
3
4
+1
-
+1
-
+1
-
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
No dithering
below shows how the dithering pattern is added in center-aligned PWM mode.
2
3
Up
Dn
Up
Dn
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+1
-
-
-
+1
-
+1
-
+1
-
+1
-
+1
-
PWM period
5
6
7
8
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
-
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
-
+1
+1
+1
+1
+1
+1
Dithering up
PWM period
4
5
Up
Dn
Up
Dn
-
-
-
-
-
-
-
-
-
-
+1
-
-
-
+1
-
-
-
+1
-
-
-
+1
-
-
-
+1
-
RM0440 Rev 1
9
10
11
12
13
-
+1
-
+1
-
+1
-
+1
-
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
-
+1
+1
+1
+1
+1
+1
+1
+1
+1
Dithering down
6
7
Up
Dn
Up
Dn
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+1
-
-
+1
+1
-
+1
RM0440
14
15
16
-
-
-
-
+1
-
-
+1
-
-
+1
-
-
+1
-
+1
+1
-
+1
+1
-
+1
+1
-
+1
+1
-
Figure 305
MSv50904V1
8
Up
Dn
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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