ST STM32G4 Series Reference Manual page 1291

RM0440
Bits 27:24 TI4SEL[3:0]: Selects tim_ti4[0..15] input
Bits 23:20 Reserved, must be kept at reset value.
Bits 19:16 TI3SEL[3:0]: Selects tim_ti3[0..15] input
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:8 TI2SEL[3:0]: Selects tim_ti2[0..15] input
Bits 7:4 Reserved, must be kept at reset value.
Bits 3:0 TI1SEL[3:0]: Selects tim_ti1[0..15] input
28.5.27 TIMx alternate function register 1 (TIMx_AF1)(x = 2 to 5)
Address offset: 0x060
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
ETRSEL[1:0] Res. Res.
rw rw
0000: tim_ti4_in0: TIMx_CH4
0001: tim_ti4_in1
...
1111: tim_ti4_in15
Refer to Section 28.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals
implementation.
0000: tim_ti3_in0: TIMx_CH3
0001: tim_ti3_in1
...
1111: tim_ti3_in15
Refer to Section 28.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals
implementation.
0000: tim_ti2_in0: TIMx_CH2
0001: tim_ti2_in1
...
1111: tim_ti2_in15
Refer to Section 28.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals
implementation.
0000: tim_ti1_in0: TIMx_CH1
0001: tim_ti1_in1
...
1111: tim_ti1_in15
Refer to Section 28.4.2: TIM2/TIM3/TIM4/TIM5 pins and internal signals
implementation.
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
General-purpose timers (TIM2/TIM3/TIM4/TIM5)
24 23 22
Res. Res. Res.
8 7 6
Res. Res. Res.
RM0440 Rev 1
for product specific
for product specific
for product specific
for product specific
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res. Res. Res. Res.
17 16
ETRSEL[3:2]
rw rw
1 0
Res. Res.
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