ST STM32G4 Series Reference Manual page 1154

Advanced-control timers (TIM1/TIM8/TIM20)
Bit 10 CC3NE: Capture/compare 3 complementary output enable
Bit 9 CC3P: Capture/compare 3 output polarity
Bit 8 CC3E: Capture/compare 3 output enable
Bit 7 CC2NP: Capture/compare 2 complementary output polarity
Bit 6 CC2NE: Capture/compare 2 complementary output enable
Bit 5 CC2P: Capture/compare 2 output polarity
Bit 4 CC2E: Capture/compare 2 output enable
Bit 3 CC1NP: Capture/compare 1 complementary output polarity
CC1 channel configured as output:
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
Bit 2 CC1NE: Capture/compare 1 complementary output enable
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
1154/2083
Refer to CC1NE description
Refer to CC1P description
Refer to CC1E description
Refer to CC1NP description
Refer to CC1NE description
Refer to CC1P description
Refer to CC1E description
0: tim_oc1n active high.
1: tim_oc1n active low.
CC1 channel configured as input:
This bit is used in conjunction with CC1P to define the polarity of tim_ti1fp1 and tim_ti2fp1.
Refer to CC1P description.
in TIMx_BDTR register) and CC1S="00" (channel configured as output).
set in the TIMx_CR2 register then the CC1NP active bit takes the new value from the
preloaded bit only when a Commutation event is generated.
0: Off - tim_oc1n is not active. tim_oc1n level is then function of MOE, OSSI, OSSR, OIS1,
OIS1N and CC1E bits.
1: On - tim_oc1n signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1E bits.
set in the TIMx_CR2 register then the CC1NE active bit takes the new value from the
preloaded bit only when a Commutation event is generated.
RM0440 Rev 1
RM0440