ST STM32G4 Series Reference Manual page 927

RM0440
26.5.12 HRTIM timer x control register (HRTIM_TIMxCR) (x = A to F)
Address offset: Block A: 0x080
Address offset: Block B: 0x100
Address offset: Block C: 0x180
Address offset: Block D: 0x200
Address offset: Block E: 0x280
Address offset: Block F: 0x300
Reset value: 0x0000 0000
31 30 29
UPDGAT[3:0]
rw rw rw
15 14 13
DELCMP4[1:0] DELCMP2[1:0]
rw rw rw
28 27 26 25
PREEN DACSYNC[1:0]
rw rw rw rw
12 11 10 9
SYNCS SYNCR RSYNC
TRTx STx U
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24 23 22
MSTU TEU TDU
rw rw rw
8 7 6
PSHPL
INTLVD[1:0] HALF
L
rw rw rw
RM0440 Rev 1
High-resolution timer (HRTIM)
21 20 19 18
TxRST
TCU TBU TAU
U
rw rw rw rw
5 4 3 2
RETRI
CONT
G
rw rw rw rw
17 16
TxREP
TFU
U
rw rw
1 0
CKPSCx[2:0]
rw rw
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