Erase Block Register 1 - Renesas F-ZTAT H8 Series Hardware Manual

Section 19 Flash Memory (H8/3048F: Dual Power Supply (V
19.3.2

Erase Block Register 1

Erase block register 1 (EBR1) is an eight-bit register that designates large flash-memory blocks for
programming and erasure. EBR1 is initialized to H'00 by a reset, in the standby modes, when 12 V
is applied to V while the V
PP
is set to 1, the corresponding block is selected and can be programmed and erased. Figure 19.2
shows a block map.
Bit 7
LB7
Initial value* 0
Read/Write R/W*
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes 1,
2, 3, and 4 (on-chip flash memory disabled), this register cannot be modified and is always
read as H'FF.
Bits 7 to 0—Large Block 7 to 0 (LB7 to LB0): These bits select large blocks (LB7 to LB0) to be
programmed and erased.
Bits 7 to 0:
LB7 to LB0 Description
0 Block LB7 to LB0 is not selected
1 Block LB7 to LB0 is selected
Rev. 7.00 Sep 21, 2005 page 592 of 878
REJ09B0259-0700
E bit is 0, and when 12 V is not applied to V
PP
6 5
LB6 LB5
0 0
R/W* R/W* R/W*
= 12 V))
PP
4 3
LB4 LB3 LB2
0 0
R/W* R/W*
. When a bit in EBR1
PP
2 1 0
LB1 LB0
0 0 0
R/W* R/W*
(Initial value)