Dma Block Size Register (Dbsr) - Renesas H8SX/1500 Series Hardware Manual

7.2.5

DMA Block Size Register (DBSR)

DBSR specifies the repeat size or block size. DBSR is enabled in repeat transfer mode and block
transfer mode and is disabled in normal transfer mode.
Bit 31
Bit Name BKSZH31
Initial Value 0
R/W R/W
Bit 23
Bit Name BKSZH23
Initial Value 0
R/W R/W
Bit 15
Bit Name BKSZ15
Initial Value 0
R/W R/W
Bit 7
Bit Name BKSZ7
Initial Value 0
R/W R/W
Bit Bit Name
31 to 16 BKSZH31 to
BKSZH16
15 to 0 BKSZ15 to
BKSZ0
30 29
BKSZH30 BKSZH29
0 0
R/W R/W
22 21
BKSZH22 BKSZH21
0 0
R/W R/W
14 13
BKSZ14 BKSZ13
0 0
R/W R/W
6 5
BKSZ6 BKSZ5
0 0
R/W R/W
Initial
Value R/W Description
Undefined R/W Specify the repeat size or block size.
When H'0001 is set, the repeat or block size is one byte,
one word, or one longword. When H'0000 is set, it
means the maximum value (refer to table 7.1). While the
DMA is in operation, the setting is fixed.
Undefined R/W Indicate the remaining repeat or block size while the
DMA is in operation. The value is decremented by 1
every time data is transferred. When the remaining size
becomes 0, the value of the BKSZH bits is loaded. Set
the same value as the BKSZH bits.
28 27
BKSZH28 BKSZH27 BKSZH26
0 0
R/W R/W
20 19
BKSZH20 BKSZH19 BKSZH18
0 0
R/W R/W
12 11
BKSZ12 BKSZ11 BKSZ10
0 0
R/W R/W
4 3
BKSZ4 BKSZ3
0 0
R/W R/W
Rev. 3.00 Mar. 14, 2006 Page 141 of 804
Section 7 DMA Controller (DMAC)
26 25
BKSZH25 BKSZH24
0 0
R/W R/W
18 17
BKSZH17 BKSZH16
0 0
R/W R/W
10 9
BKSZ9 BKSZ8
0 0
R/W R/W
2 1
BKSZ2 BKSZ1 BKSZ0
0 0
R/W R/W
REJ09B0104-0300
24
0
R/W
16
0
R/W
8
0
R/W
0
0
R/W