Gpio Port E Direction (Gpedir) Register; Spruh22I - April 2012 - Revised November 2019; Gpio Port C Direction (Gpcdir) Register Field Descriptions; Gpio Port E Direction (Gpedir) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 4-70. GPIO Port C Direction (GPCDIR) Register Field Descriptions
Bits Field
31-8 Reserved
7-4 GPIO71-GPIO68
3-0 Reserved
(1)
This register is EALLOW protected.

4.2.7.22 GPIO Port E Direction (GPEDIR) Register

The GPIO Port E Direction (GPEDIR) register is shown and described in the figure and table below.
31
15
7 6
GPIO135 GPIO134
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-71. GPIO Port E Direction (GPEDIR) Register Field Descriptions
Bits Field
31-8 Reserved
7-0 GPIO135-GPIO128
(1)
This register is EALLOW protected.
SPRUH22I – April 2012 – Revised November 2019
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Value
Any writes to these bit(s) must always have a value of 0.
Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
Any writes to these bit(s) must always have a value of 0.
Figure 4-63. GPIO Port E Direction (GPEDIR) Register
Reserved
Reserved
5 4
GPIO133 GPIO132
R/W-0 R/W-0
Value
Any writes to these bit(s) must always have a value of 0.
Controls direction of GPIO pin when GPIO mode is selected. Reading the register returns the
current value of the register setting
0 Configures the GPIO pin as an input. (default)
1 Configures the GPIO pin as an output
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
(1)
Description
R-0
R-0
3 2
GPIO131 GPIO130
R/W-0 R/W-0
(1)
Description
General-Purpose Input/Output (GPIO)
16
8
1 0
GPIO129 GPIO128
R/W-0 R/W-0
411