ST STM32G4 Series Reference Manual page 1493

RM0440
Reset value: 0x0000 0000
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Bits 31:0 IVI[95:64]: Initialization vector input, bits [95:64]
Refer to the AES_IVR0 register for description of the IVI[128:0] bitfield.
33.7.12 AES initialization vector register 3 (AES_IVR3)
Address offset: 0x2C
Reset value: 0x0000 0000
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Bits 31:0 IVI[127:96]: Initialization vector input, bits [127:96]
Refer to the AES_IVR0 register for description of the IVI[128:0] bitfield.
33.7.13 AES key register 4 (AES_KEYR4)
Address offset: 0x30
Reset value: 0x0000 0000
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Bits 31:0 KEY[159:128]: Cryptographic key, bits [159:128]
Refer to the AES_KEYR0 register for description of the KEY[255:0] bitfield.
33.7.14 AES key register 5 (AES_KEYR5)
Address offset: 0x34
Reset value: 0x0000 0000
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IVI[95:80]
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IVI[79:64]
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IVI[127:112]
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IVI[111:96]
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KEY[159:144]
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KEY[143:128]
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RM0440 Rev 1
AES hardware accelerator (AES)
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