Figure 17.16 Transitions To Error Protection State - Renesas H8SX/1500 Series Hardware Manual

Error protection is canceled by a reset. Note that the reset should be released after the reset input
period of at least 100 µs has passed. Since high voltages are applied during programming/erasing
of the flash memory, some voltage may remain after the error protection state has been entered.
For this reason, it is necessary to reduce the risk of damaging the flash memory by extending the
reset input period so that the charge is released.
The state-transition diagram in figure 17.16 shows transitions to and from the error protection
state.
Programming/erasing
mode
Read disabled
Programming/erasing enabled
FLER = 0
Error occurrence
Error-protection mode
Read enabled
Programming/erasing disabled
FLER = 1
RES = 0
Software standby mode
Cancel
software standby mode

Figure 17.16 Transitions to Error Protection State

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
Reset
(hardware protection)
Read disabled
Programming/erasing disabled
FLER = 0
RES = 0
Programming/erasing interface
register is in its initial state.
Error-protection mode
(software standby)
Read disabled
Programming/erasing disabled
FLER = 1
Programming/erasing interface
register is in its initial state.
Rev. 3.00 Mar. 14, 2006 Page 625 of 804
REJ09B0104-0300