Table 13.3 Setting Range For Tseg1 And Tseg2 In Bcr - Renesas H8SX/1500 Series Hardware Manual

Section 13 Controller Area Network (HCAN)
Time quanta (tq) is an integer multiple of the number of system clocks, and is determined by the
baud rate prescaler (BRP) as follows. f
tq = 2 × (BPR setting + 1)/f
The following formula is used to calculate the 1-bit time and bit rate.
1-bit time = tq × (3 + TSEG1 + TSEG2)
Bit rate = 1/Bit time
/{2 × (BPR setting + 1) × (3 + TSEG1 + TSEG2)}
= f
CLK
Note: f = Pφ (peripheral module clock)
CLK
A BCR value is used for BRP, TSEG1, and TSEG2.
Example: With a peripheral module clock (Pφ) of 20 MHz, a BRP setting of B'000000, a TSEG1
setting of B'0100, and a TSEG2 setting of B'011:
Bit rate = 20/{2 × (0 + 1) × (3 + 4 + 3)} = 1 Mbps

Table 13.3 Setting Range for TSEG1 and TSEG2 in BCR

TSEG1
(BCR11 to BCR8) 001
0011 No
0100 Yes*
0101 Yes*
0110 Yes*
0111 Yes*
1000 Yes*
1001 Yes*
1010 Yes*
1011 Yes*
1100 Yes*
1101 Yes*
1110 Yes*
1111 Yes*
Notes: The time quantum values for TSEG1 and TSEG2 are determined by TSEG value + 1.
* Settable when BRP is not B'000000.
Rev. 3.00 Mar. 14, 2006 Page 488 of 804
REJ09B0104-0300
is the frequency of the peripheral module clock (Pφ).
CLK
CLK
TSEG2 (BCR14 to BCR12)
010 011
Yes No
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
100 101
No No
No No
Yes No
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
110 111
No No
No No
No No
No No
Yes No
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes