Interrupt Priority Registers A To H, J, K, M (Ipra To Iprh,Iprj, Iprk, Iprm) - Renesas H8S Series Hardware Manual

Section 5 Interrupt Controller
5.3.1

Interrupt Priority Registers A to H, J, K, M (IPRA to IPRH,IPRJ, IPRK, IPRM)

The IPR registers are eleven 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between interrupt sources and IPR settings is shown in table 5.2. Setting a
value in the range from H'0 to H'7 in the 3-bit groups of bits 0 to 2 and 4 to 6 sets the priority of
the corresponding interrupt.
Bit Bit Name
7 —
6 IPR6
5 IPR5
4 IPR4
3 —
2 IPR2
1 IPR1
0 IPR0
Rev. 6.00 Mar 15, 2006 page 70 of 570
REJ09B0211-0600
Initial Value R/W
0 —
1 R/W
1 R/W
1 R/W
0 —
1 R/W
1 R/W
1 R/W
Description
Reserved
These bits are always read as 0.
Sets the priority of the corresponding interrupt
source.
000: Priority level 0 (Lowest)
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (Highest)
Reserved
These bits are always read as 0.
Sets the priority of the corresponding interrupt
source.
000: Priority level 0 (Lowest)
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (Highest)